Liquid crystal display device and fabricating method thereof

• US 7,583,336 B2
• Filed: 06/02/2005
• Issued: 09/01/2009
• Est. Priority Date: 06/05/2004
• Status: Expired due to Fees

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Ahn, Byung Chul
• Primary Examiner(s): Rude; Timothy
• Application Number:
  US11/142,314
• Publication Number:
  US 20050270451A1
• Time in Patent Office: 1,552 Days
• Field of Search: 349/106, 349113-115, 349/40, 349 54- 55, 349/192, 324/770
• US Class Current: 349/114
• CPC Class Codes: G02F 1/133555 Transflectors
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/136231 for reducing the number of lithographic steps

Abstract

A liquid crystal display device is provided that includes: first and second substrates; a gate line of a double layer having a first transparent conductive layer and a second opaque conductive layer on the first substrate; a first insulation film on the gate line; a data line crossing the gate line to define a pixel region, the pixel region having a transmissive area and a reflective area; a thin film transistor connected to the gate and data lines; a pixel electrode having the first conductive layer in the pixel region and a second conductive layer along the boundary of the first conductive layer; a storage upper electrode to form a storage capacitor by overlapping with the gate line the first insulation film there between; a transmission hole to expose the side of the storage upper electrode and a drain electrode of the thin film transistor by passing through the first insulation film and a second insulation film on the thin film transistor; a reflective electrode connected the second conductive layer of the pixel electrode with the drain electrode and the storage upper electrode through an edge portion of the transmission hole; and a liquid crystal layer between the first and second substrates.

Claims

1. A liquid crystal display device, comprising:

first and second substrates;

a gate line having a double layer including a first transparent conductive layer and a second opaque conductive layer on the first substrate;

a first insulation film on the gate line;

a data line crossing the gate line to define a pixel region, the pixel region having a transmissive area and a reflective area;

a thin film transistor connected to the gate and data lines;

a pixel electrode having the first conductive layer in the pixel region and the second conductive layer along a boundary of the first conductive layer;

a storage upper electrode forming a storage capacitor by overlapping the gate line with the first insulation film there between;

a transmission hole formed in the transmissive area and exposing a side of the storage upper electrode and a side of a drain electrode of the thin film transistor by passing through the first insulation film and a second insulation film on the thin film transistor;

a reflective electrode directly connected to the second conductive layer of the pixel electrode, the drain electrode and the storage upper electrode at an edge portion of the transmission hole, respectively; and

a liquid crystal layer between the first and second substrates.

2. The device of claim 1, further comprising:

a gate pad extending from the first conductive layer of the gate line; and

a data pad formed of the first conductive layer of the gate pad.

3. The device of claim 2, wherein the first and second insulation films are removed in the pad region.

4. The device of claim 2, further comprising:

a data link extending from the data pad and overlapping an end part of the data line;

a first contact hole exposing the data link by passing through the first insulating film from the second insulation film via the data line; and

a contact electrode laterally connected to the data line through the first contact hole and surface-connected to the data link.

5. The device of claim 4, wherein a first portion of the data link is formed of the first and second conductive layers, and a second portion of the data link is formed of the first conductive layer as the data pad.

6. The device of claim 5, wherein the first portion overlaps with the second insulation film.

7. The device of claim 5, wherein the second portion does not overlap the second insulation film.

8. The device of claim 4, wherein the contact electrode is formed of the same metal as the reflective electrode.

9. The device of claim 1, wherein the second insulation film is formed of an organic material.

10. The device of claim 1, further comprising:

a third insulation film formed between the thin film transistor and the second insulation film.

11. The device of claim 10, wherein the third insulation film is an inorganic material.

12. The device of claim 10, wherein the transmission hole passes through the third insulation film.

13. The device of claim 1, further comprising:

an electrostatic discharging device connected to one of the data line and the gate line.

14. The device of claim 13, wherein the electrostatic discharging device comprises:

a second thin film transistor connected to one of the data line and the gate line;

a third thin film transistor connected between a gate electrode and a source electrode of the second thin film transistor in a diode form;

a fourth thin film transistor connected between the gate electrode and the drain electrode of the second thin film transistor in a diode form;

a second contact electrode connecting a source electrode and a gate electrode of the third thin film transistor through a second contact hole;

a third contact electrode connecting a drain electrode of the third or fourth thin film transistor and the gate electrode of the second thin film transistor through a third contact hole; and

a fourth contact electrode connecting a source electrode and a gate electrode of the fourth thin film transistor through a fourth contact hole.

15. The device of claim 14, wherein the second, third and fourth contact electrodes are formed of the same metal layer as the reflective electrode.

16. The device of claim 14, wherein the second and third contact holes expose a corresponding gate electrode by passing through the second insulation film to the gate insulating film via a source or drain electrode.

17. The device of claim 14, wherein the first to fourth contact electrodes are formed in a sealant area.

18. The device of claim 1, wherein the reflective electrode has an embossed surface.

19. The device of claim 18, wherein the second insulation film has an embossed surface.

20. The device of claim 1, further comprising a third conductive layer on the second conductive layer of the pixel electrode, a gate electrode of the thin film transistor, and the gate line.

21. A liquid crystal display device, comprising:

first and second substrates;

a gate line having a double layer structure including a first transparent conductive layer and a second opaque conductive layer;

a first insulation film on the gate line;

a data line crossing the gate line to define a pixel region, the pixel region having a transmissive area and a reflective area;

a thin film transistor connected to the gate and data lines;

a pixel electrode having the first conductive layer and the second conductive layer along the boundary of the first conductive layer;

a storage line having a double layer and a storage lower electrode integrated with the storage line;

a storage upper electrode integrated with a drain electrode of the thin film transistor and overlapping the storage lower electrode with the first insulation film there between to form a storage capacitor;

a transmission hole formed in the transmissive area and exposing a side surface of the storage upper electrode by passing through the first insulation film from a second insulation film on the thin film transistor;

a reflective electrode directly connected to the second conductive layer of the pixel electrode, the drain electrode and the storage upper electrode at an edge portion of the transmission hole, respectively; and

a liquid crystal layer between the first and second substrates.

22. The device of claim 21, wherein the storage line crosses the data line.

23. The device of claim 21, further comprising:

a gate pad extending from the first conductive layer of the gate line; and

a data pad formed of the first conductive layer of the gate pad.

24. The device of claim 23, wherein the first and second insulation films are removed in the pad region.

25. The device of claim 23, further comprising:

a data link extending from the data pad and overlapping an end part of the data line;

a first contact hole exposing the data line by passing through the first insulation film from the second insulation film via the data line; and

a contact electrode laterally connected to the data line through the first contact hole and surface-connected to the data link.

26. The device of claim 25, wherein a first portion of the data link is formed of the first and second conductive layers, and a second portion of the data link is formed of the first conductive layer as the data pad.

27. The device of claim 26, wherein the first portion overlaps the second insulation film.

28. The device of claim 26, wherein the second portion does not overlap with the second insulation film.

29. The device of claim 23, wherein the contact electrode is formed of the same metal as the reflective electrode.

30. The device of claim 21, further comprising:

a third insulation film formed between the thin film transistor and the second insulation film.

31. The device of claim 30, wherein the third insulation film is an inorganic material.

32. The device of claim 30, wherein the transmission hole passes through the third insulation film.

33. The device of claim 21, wherein the reflective electrode has an embossed surface.

34. The device of claim 33, wherein the second insulation film has an embossed surface.

35. The device of claim 21, further comprising:

a third conductive layer on the second conductive layer of the pixel electrode, a gate electrode of the thin film transistor and the gate line.