Baseband controller in a wireless local area network

• US 7,583,932 B2
• Filed: 10/09/2006
• Issued: 09/01/2009
• Est. Priority Date: 11/08/2001
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Lin, John
• Primary Examiner(s): Yun; Eugene
• Application Number:
  US11/539,783
• Publication Number:
  US 20070087692A1
• Time in Patent Office: 1,058 Days
• Field of Search: 455/41.2, 455/514, 455/185.1, 455/41.3, 455/231, 455/507, 455/517, 455/181.1
• US Class Current: 455/41.2
• CPC Class Codes: H04J 3/0685 Clock or time synchronisation in a node; Intranode synchronisation
• CPC Class Codes: H04W 28/06 Optimizing the usage of the radio link, e.g. header compression, information sizing , discarding information system modifying transmission characteristic according to link quality by modifying frame length H04L1/0007; dynamic adaptation of the packet size for flow control or congestion control H04L47/365
• CPC Class Codes: H04W 28/14 using intermediate storage
• CPC Class Codes: H04W 84/12 WLAN [Wireless Local Area Networks]
• CPC Class Codes: H04W 84/18 Self-organising networks, e.g. ad-hoc networks or sensor networks

Abstract

A baseband controller includes a microsequencer with special hardware resources circuitry and a configuration that supports real-time Bluetooth functionality for an upper limit of Bluetooth slave devices. The microsequencer includes a 72-bit correlator that may also be used as an accumulator, wherein the topology provides that the correlator can communicate with a 72-bit arithmetic logic unit that correspondingly enables the correlator to act as an accumulator. The microsequencer also includes a plurality of clocks and timers for facilitating Bluetooth timing functionality, and at least four registers for temporarily storing computational data, where each of the storage registers have different sizes for accommodating different-sized packets of computational data.

Claims

1. A microsequencer for a real-time Bluetooth baseband controller used to service a plurality of slave devices, comprises:

timer circuitry to accommodate an upper limit of timer requests, the timer circuitry includes a plurality of timers to facilitate service to each of the plurality of slave devices;

temporary data storage circuitry that includes a plurality of registers each having a different register size, wherein the temporary data storage circuitry receives computational data, and stores the computational data in a register selected from the plurality of registers based upon a size of the computational data; and

a plurality of Bluetooth and native clocks coupled to drive the timer circuitry based upon a Bluetooth timing functionality according to a Bluetooth specification, wherein the plurality of Bluetooth and native clocks drive the timer circuitry to facilitate a Bluetooth timing functionality.

2. The microsequencer of claim 1 wherein the plurality of native and externally driven clocks include an external real-time clock, wherein an external master clock drives the external real-time clock.

3. The microsequencer of claim 1 wherein the plurality of registers include a 64-bit register, a 48-bit register, a 32-bit register and a 16-bit register.

4. The microsequencer of claim 1 wherein the temporary data storage circuitry further comprises:

a data storage logic module coupled to the plurality of registers, wherein the data storage logic module selects the register of the plurality of registers to use based upon the size of the computational data that is to be temporarily stored.

5. The microsequencer of claim 1 wherein the timers include at least four timers.

6. The microsequencer of claim 1 wherein the timers include at least eight timers.

7. The microsequencer of claim 1 further including timer control logic circuitry for controlling the operation of the at least eight timers.