Process for producing group III nitride compound semiconductor light emitting device, group III nitride compound semiconductor light emitting device and lamp

• US 7,585,690 B2
• Filed: 11/21/2007
• Issued: 09/08/2009
• Est. Priority Date: 11/22/2006
• Status: Active Grant

• Current Assignee: Toyoda Gosei Company Limited (Toyota Motor Corporation)
• Original Assignee: Showa Denko KK (Resonac Holdings Corp.)
• Inventors: Hanawa, Kenzo, Sasaki, Yasumasa, Miki, Hisayuki
• Primary Examiner(s): LE, DUNG ANH
• Application Number:
  US11/944,306
• Publication Number:
  US 20080116478A1
• Time in Patent Office: 657 Days
• Field of Search: 438602-605, 438 48- 52, 428 22- 23
• US Class Current: 438/48
• CPC Class Codes: B82Y 20/00 Nanooptics, e.g. quantum optics or photonic crystals
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02579 P-type
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48257 connecting the wire to a die pad of the item
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H01L 2924/30111 matching
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/325 characterised by the doping materials
• CPC Class Codes: H01S 2304/04 : MOCVD or MOVPE
• CPC Class Codes: H01S 5/34333 : with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Abstract

A process for producing a group III nitride compound semiconductor light emitting device, the group III nitride compound semiconductor light emitting device and a lamp, having excellent producability and excellent light emitting characteristics are provided. Such a process for producing a group III nitride semiconductor light emitting device is a process for producing a group III nitride semiconductor light emitting device having a semiconductor layer 20 constituted by laminating an n-type semiconductor layer, a light-emitting layer 15 and a p-type semiconductor layer 16. Each of these consists of a group III nitride semiconductor, including a step of forming at least a part of the semiconductor layer 20 by a sputtering method, in which upon forming the p-type semiconductor layer 14 by a sputtering method, a Ga target containing Ga element, and a dopant target consisting of a mixture of an element having a small crystal composition of elements contained in the p-type semiconductor layer 14 and a dopant element is used as a sputtering target, and power is applied simultaneously to both the Ga target and the dopant target.

Claims

1. A process for producing a group III nitride semiconductor light emitting device having a semiconductor layer constituted by laminating an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each of which consisting of a group III nitride semiconductor, comprising a step of forming at least a part of the semiconductor layer by a sputtering method, wherein upon forming the p-type semiconductor layer by a sputtering method, a Ga target containing Ga element, and a dopant target consisting of a mixture of an element having a small crystal composition of elements contained in the p-type semiconductor layer and a dopant element is used as a sputtering target, and power is applied simultaneously to both the Ga target and the dopant target.

2. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 1, wherein the dopant element is Mg, and the element having a small crystal composition is Al.

3. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 1, wherein the power applied to the target upon forming the p-type semiconductor layer is applied by a high frequency method or a pulse DC method.

4. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 1, wherein upon forming the p-type semiconductor layer, a magnetic field is rotated or swung to the sputtering target.

5. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 1, wherein the forming of the p-type semiconductor layer is performed by a reactive sputtering method to flow a nitride raw material in a reactor.

6. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 5, wherein the nitride raw material is nitrogen.

7. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 1, wherein the semiconductor layer is formed on a buffer layer consisting of columnar crystal which is formed on a substrate before the semiconductor layer is formed.

8. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 7, wherein the buffer layer consists of a group III nitride compound containing Al as a group III element.

9. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 8, wherein the buffer layer consists of AIN.

10. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 7, wherein the buffer layer is formed so as to cover at least 90% of the surface of the substrate.

11. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 7, wherein the columnar crystal constituting the buffer layer has a grain ranging from 0.1 to 100 nm.

12. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 7, wherein the buffer layer has a thickness ranging from 10 to 500 nm.

13. The process for producing a group III nitride semiconductor light emitting device as set forth in claim 7, wherein the substrate consists of sapphire.