Amplification-type CMOS image sensor of wide dynamic range

• US 7,586,523 B2
• Filed: 10/26/2006
• Issued: 09/08/2009
• Est. Priority Date: 10/28/2005
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Okamoto, Ryuta, Goto, Hiroshige, Egawa, Yoshitaka, Ohsawa, Shinji
• Primary Examiner(s): Ometz; David L
• Assistant Examiner(s): Tejano; Dwight Alex C
• Application Number:
  US11/553,233
• Publication Number:
  US 20070097240A1
• Time in Patent Office: 1,048 Days
• Field of Search: 348/229.1, 348/308, 348/362
• US Class Current: 348/229.1
• CPC Class Codes: H04N 23/70 Circuitry for compensating brightness variation in the scene
• CPC Class Codes: H04N 23/741 by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/583 with different integration times

Abstract

A solid-state image sensor which includes a pixel section, AD converter, line memory, controller and synthesizer is disclosed. The line memory stores a digital signal output from the AD converter. The controller controls the pixel section and AD converter to subject analog signals of different exposure times to an AD converting process by use of the AD converter and transfer the thus AD-converted signals to the line memory in an accumulation period of charges of one frame. The synthesizer is supplied with digital signals of different exposure times from the line memory, compare a fist signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by the ratio of the signal of short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.

Claims

1. A solid-state image sensing device comprising:

a pixel section having cells arranged in a two-dimensional form of rows and columns on a semiconductor substrate, each of the cells including photoelectric converting means for converting an optical signal into an electrical signal, reading means for reading signal charges obtained by photoelectrically converting incident light by use of the photoelectric converting means and supplying the thus read signal charges to a detecting section, amplifying means for amplifying and outputting voltage corresponding to the signal charges accumulated in the detecting section and reset means for resetting the signal charges of the detecting section,

an AD converting circuit configured to convert an analog signal output from the pixel section into a digital signal and output the thus converted digital signal,

a line memory configured to store the digital signal output from the AD converting circuit,

a control circuit configured to control the pixel section and AD converting circuit, subject a plurality of analog signals of different exposure times to AD conversion by use of the AD converting circuit and transfer the AD-converted signals to the line memory in a charge accumulation time period of one frame, and

a synthesizing circuit configured to be supplied with a plurality of digital signals of different exposure times from the line memory, compare a first signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by a ratio of the signal of the short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.

2. The solid-state image sensing device according to claim 1, wherein the synthesizing circuit includes an amplifier circuit configured to amplify part of a signal of short exposure time for emphasis before adding the signals of short and long exposure times.

3. The solid-state image sensing device according to claim 1, wherein the synthesizing circuit further includes an inverse logarithm amplifier circuit configured to amplify the read signals of short and long exposure times by use of an inverse logarithm value of the exposure time and add the amplification results.

4. The solid-state image sensing device according to claim 1, further comprising a pulse amplitude control circuit configured to output voltage of a intermediate level to set the reading means into an open state and discharge signal charges into the detecting section of the pixel.

5. The solid-state image sensing device according to claim 1, wherein the photoelectric converting means is a photodiode whose anode is grounded.

6. The solid-state image sensing device according to claim 1, wherein the reading means is a read transistor whose current path is connected at one end to a cathode of the photodiode and connected at the other end to the detecting section and whose gate is supplied with a read pulse.

7. The solid-state image sensing device according to claim 1, wherein the amplifying means is an amplifying transistor whose gate is connected to the detecting section and whose current path is connected at one end to a vertical signal line.

8. The solid-state image sensing device according to claim 1, wherein the reset means is a reset transistor whose current path is connected at one end to a power supply and connected at the other end to the detecting section and whose gate is supplied with a reset pulse.

9. A solid-state image sensing device comprising:

a pixel section having cells arranged in a two-dimensional form of rows and columns on a semiconductor substrate,

an AD converting circuit configured to convert an analog signal output from the pixel section into a digital signal and output the thus converted digital signal,

a line memory configured to store the digital signal output from the AD converting circuit,

a control circuit configured to control the pixel section and AD converting circuit, subject a plurality of analog signals of different exposure times to AD conversion by use of the AD converting circuit and transfer the AD-converted signals to the line memory in a charge accumulation time period of one frame, and

a wide dynamic range mixing circuit configured to be supplied with a plurality of digital signals of different exposure times from the line memory, compare a first signal obtained by adding signals of short and long exposure times with a second signal obtained by amplifying the signal of short exposure time by a ratio of the signal of the short exposure time to the signal of long exposure time, select a larger one of the compared signals and output the selected signal.

10. The solid-state image sensing device according to claim 9, wherein the wide dynamic range mixing circuit includes an amplifier circuit configured to amplify part of a signal of short exposure time for emphasis before adding the signals of short and long exposure times.

11. The solid-state image sensing device according to claim 9, wherein the wide dynamic range mixing circuit includes an inverse logarithm amplifier circuit configured to amplify the read signals of short and long exposure times by use of an inverse logarithm value of the exposure time and add the amplification results.

12. The solid-state image sensing device according to claim 9, wherein the wide dynamic range mixing circuit includes a first subtracter circuit configured to subtract a preset lower bit of a black level from a signal of short exposure time stored in the line memory, a second subtracter circuit configured to subtract a preset lower bit of a black level from a signal of long exposure time stored in the line memory, a gain circuit configured to amplify an output of the first subtracter circuit with a gain corresponding to the ratio of the signal of long exposure time to the signal of short exposure time, an adder circuit configured to add an output signal of the gain circuit and an output signal of the second subtracter circuit, a switch provided between the gain circuit and the adder circuit, a determination circuit configured to turn ON the switch when a signal starts to be output from the first subtracter circuit, a white balance processing circuit configured to perform a white balance process for a signal output from the adder circuit to set R, G and B signals to the same level, and a compression circuit configured to compress and output an output signal of the white balance processing circuit.

13. The solid-state image sensing device according to claim 11, wherein the wide dynamic range mixing circuit includes a first subtracter circuit configured to subtract a preset lower bit of a black level from a signal of short exposure time stored in the line memory, a second subtracter circuit configured to subtract a preset lower bit of a black level from a signal of long exposure time stored in the line memory, an adder circuit configured to add output signals of the first and second subtracter circuits, a first switch provided between the second subtracter circuit and the adder circuit, a first determination circuit configured to turn ON the first switch when a signal starts to be output from the second subtracter circuit, an amplifier circuit configured to amplify an output of the second subtracter circuit by a gain corresponding to the ratio of the signal of long exposure time to the signal of short exposure time, a white balance processing circuit configured to perform a white balance process to set R, G and B signals to the same level, a second switch which selectively connects one of the amplifier circuit and adder circuit to the white balance processing circuit, a second determination circuit configured to control the second switch when determining that a time period of the sum of the signals of long and short exposure times exceeds an accumulation time ratio multiplied by the gain, and a compression circuit configured to compress and output an output signal of the white balance processing circuit.

14. The solid-state image sensing device according to claim 9, wherein the cell includes a photoelectric converter which converts an optical signal into an electrical signal, a reading circuit configured to read signal charges obtained by photoelectrically converting incident light by the photoelectric converter and supplying the read signal charges to a detecting section, an amplifier configured to amplify and output voltage corresponding to the signal charges accumulated in the detecting section, and a reset circuit configured to reset the signal charges of the detecting section.

15. The solid-state image sensing device according to claim 14, further comprising a pulse amplitude control circuit configured to output voltage of a intermediate level to set the reading circuit into an open state and discharge signal charges into the detecting section of the pixel.

16. The solid-state image sensing device according to claim 14, wherein the photoelectric converter is a photodiode whose anode is grounded, the reading circuit is a read transistor whose current path is connected at one end to a cathode of the photodiode and connected at the other end to the detecting section and whose gate is supplied with a read pulse, the amplifier is an amplifying transistor whose gate is connected to the detecting section and whose current path is connected at one end to a vertical signal line, and the reset circuit is a reset transistor whose current path is connected at one end to a power supply and connected at the other end to the detecting section and whose gate is supplied with a reset pulse.

17. The solid-state image sensing device according to claim 9, wherein the cell includes photoelectric converting means for converting an optical signal into an electrical signal, a reading circuit configured to read signal charges obtained by photoelectrically converting incident light by the photoelectric converting means and supplying the read signal charges to a detecting section, an amplifier configured to amplify and output voltage corresponding to the signal charges accumulated in the detecting section, a row selection circuit configured to select a row, and a reset circuit configured to reset the signal charges of the detecting section.

18. The solid-state image sensing device according to claim 17, further comprising a pulse amplitude control circuit configured to output voltage of a intermediate level to set the reading circuit into an open state and discharge signal charges into the detecting section of the pixel.

19. The solid-state image sensing device according to claim 17, wherein the photoelectric converter is a photodiode whose anode is grounded, the reading circuit is a read transistor whose current path is connected at one end to a cathode of the photodiode and connected at the other end to the detecting section and whose gate is supplied with a read pulse, the amplifier is an amplifying transistor whose gate is connected to the detecting section and whose current path is connected at one end to a vertical signal line, the row selection circuit is a row section transistor whose current path is connected at one end to a power supply and connected at the other end to the other end of the current path of the amplifying transistor and whose gate is supplied with an address pulse, and the reset circuit is a reset transistor whose current path is connected at one end to a power supply and connected at the other end to the detecting section and whose gate is supplied with a reset pulse.