Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates

• US 7,586,668 B2
• Filed: 03/29/2005
• Issued: 09/08/2009
• Est. Priority Date: 12/07/2000
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Patel, Satyadev R., Huibers, Andrew G., Chiang, Steve S.
• Primary Examiner(s): Choi; William C
• Application Number:
  US11/094,087
• Publication Number:
  US 20050173711A1
• Time in Patent Office: 1,624 Days
• Field of Search: 359/198, 359/214, 359223-225, 359/290, 359/295, 359/298
• US Class Current: 359/290
• CPC Class Codes: B81B 2201/042 Micromirrors, not used as optical switches
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: B81C 1/00214 Processes for the simultaneaous manufacturing of a network or an array of similar microstructural devices
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 1/00896 Temporary protection during separation into individual elements
• CPC Class Codes: B81C 1/00904 Multistep processes for the separation of wafers into individual elements not provided for in groups B81C1/00873 - B81C1/00896
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: G02B 26/0833 the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD G02B26/0825 takes precedence; micromechanical devices in general B81B
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01018 Argon [Ar]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01054 : Xenon [Xe]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01072 : Hafnium [Hf]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.

Claims

1. A spatial light modulator comprising:

a lower semiconductor substrate comprising circuitry and electrodes;

an upper light transmissive substrate bonded in spaced apart relationship to the lower substrate;

one or more intermediate substrates bonded between the upper and lower substrates and having an open area for defining a gap between the semiconductor substrate and the light transmissive substrate;

an array of reflective micromirrors disposed within the gap;

a light blocking material on the upper light transmissive substrate and provided as a rectangular mask;

wherein the micromirrors comprise substantially square micromirror plates and torsion hinges that allow the micromirror plates to move relative to the upper and lower substrates; and

wherein the torsion hinges are disposed in a different plane than the micromirror plates.

2. The spatial light modulator of claim 1, wherein the semiconductor substrate is a silicon substrate.

3. The spatial light modulator of claim 2, wherein the torsion hinges have a thickness of 50 Å

to 2100 Å

.

4. The spatial light modulator of claim 2, comprising an SRAM cell at each micromirror location.

5. The spatial light modulator of claim 4, that has XGA resolution.

6. The spatial light modulator of claim 4, wherein the substrates are bonded together with an adhesive.

7. The spatial light modulator of claim 6, wherein the substrates are bonded together with an epoxy.

8. The spatial light modulator of claim 7, wherein the mirror devices comprise a stiction treatment.

9. The spatial light modulator of claim 7, further comprising a getter and lubricant within the gap.

10. The spatial light modulator of claim 9, wherein the gap between the upper and lower substrate is from 1 to 10 um.

11. The spatial light modulator of claim 7, wherein the epoxy is a UV cured epoxy.

12. The spatial light modulator of claim 6, wherein the adhesive is a UV cured adhesive.

13. The spatial light modulator of claim 1, wherein the electrodes are designed to run at 0-5 V.

14. The spatial light modulator of claim 1, wherein the micromirrors are formed on the semiconductor substrate.

15. The spatial light modulator of claim 14, wherein the semiconductor substrate is a silicon substrate.

16. The spatial light modulator of claim 1, wherein substrates are anodically bonded together.

17. The spatial light modulator of claim 1, wherein the substrates are solder bonded together.

18. The spatial light modulator of claim 1, wherein the substrates are compression bonded together.

19. The spatial light modulator of claim 1, wherein the micromirrors have an anti-stiction layer.

20. The spatial light modulator of claim 1, wherein the tight transmissive substrate is bonded in an offset relation to the silicon substrate.

21. The spatial light modulator of claim 20, wherein bond pads are exposed on the silicon substrate due to the offset bond.

22. The spatial light modulator of claim 21, wherein bond wires are connected to the bond pads on the silicon substrate.

23. The spatial light modulator of claim 22, wherein the micromirrors are provided in an array of between 1 and 6 million micromirrors.

24. The spatial light modulator of claim 23, wherein the micromirrors are disposed within a rectangular array.

25. The spatial light modulator of claim 1, wherein the circuitry is DRAM circuitry.

26. The spatial light modulator of claim 1, further comprising a getter disposed on the light transmissive substrate.

27. The spatial light modulator of claim 26, further comprising a lubricant which is an organic lubricant.

28. The spatial light modulator of claim 27, wherein the lower semiconductor substrate is held on a lower packaging substrate.

29. The spatial light modulator of claim 28, wherein a distance between the upper and lower substrate is from 1 to 100 microns.

30. The spatial light modulator of claim 28, wherein the semiconductor substrate, one or more intermediate substrates, the light transmissive substrate and the lower packaging substrate are the package for the spatial light modulator without further encapsulation.

31. The spatial light modulator of claim 1, further comprising a getter disposed within the gap.

32. The spatial light modulator of claim 31, wherein the getter is a moisture getter.

33. The spatial light modulator of claim 31, wherein the getter is a particle getter.

34. The spatial light modulator of claim 31, wherein the getter is a hydrogen getter.

35. The spatial light modulator of claim 31, wherein the getter is a metal oxide getter.

36. The spatial light modulator of claim 31, wherein the getter is a zeolite getter.

37. The spatial light modulator of claim 1, wherein the micromirrors comprise a self assembled monolayer.

38. The spatial light modulator of claim 1, further comprising a combination getter within the gap.

39. The spatial light modulator of claim 1, wherein the micromirrors correspond to pixels in a direct-view or projection display.

40. The spatial light modulator of claim 39, wherein the number of micromirrors is from 6,000 to about 6 million.

41. The spatial light modulator of claim 40, wherein the light transmissive substrate is glass.

42. A spatial light modulator comprising:

a lower semiconductor substrate comprising circuitry and electrodes;

an upper light transmissive substrate bonded in spaced apart relationship to the lower substrate;

one or more intermediate substrates bonded between the upper and lower substrates and having an open area for defining a gap between the semiconductor substrate and the light transmissive substrate;

an array of reflective micromirrors disposed within the gap;

a light blocking material on the upper light transmissive substrate and provided as a rectangular mask;

wherein the micromirrors comprise substantially square micromirror plates and torsion hinges that allow the micromirror plates to move relative to the upper and lower substrates; and

wherein the light transmissive substrate is bonded in an offset relation to the silicon substrate.