Probe card having a conductive thin film on the surface of an insulating film behind each of the alignment marks each marks comprises a plurality of second bumps

• US 7,589,543 B2
• Filed: 12/13/2005
• Issued: 09/15/2009
• Est. Priority Date: 12/20/2004
• Status: Expired due to Fees

• Current Assignee: Socionext Inc.
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Yamada, Kenji, Nakata, Yoshirou
• Primary Examiner(s): PATEL, PARESH H
• Application Number:
  US11/299,656
• Publication Number:
  US 20060132155A1
• Time in Patent Office: 1,372 Days
• Field of Search: None
• US Class Current: 324/750.19
• CPC Class Codes: G01R 1/07314 the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support on an elastic support, e.g. a film, G01R1/0735
• CPC Class Codes: G01R 1/0735 arranged on a flexible frame or film
• CPC Class Codes: G01R 3/00 Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments , e.g. of probe tips
• CPC Class Codes: G01R 31/2891 related to sensing or controlling of force, position, temperature G01R31/2874 takes precedence; sensing of force G01L; sensing of position G01B, G01D; sensing of temperature G01K; controlling in general G05
• CPC Class Codes: Y10T 29/49117 Conductor or circuit manufacturing
• CPC Class Codes: Y10T 29/49151 by deforming or shaping

Abstract

A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.

Claims

1. A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer, said probe card comprising:

an insulating thin film held by a rigid ring;

a plurality of first bumps on the insulating thin film for contacting inspection electrodes of a plurality of semiconductor integrated circuit devices;

a plurality of alignment marks on the insulating thin film, and

a conductive thin film on a surface of the insulating thin film behind each of the alignment marks, the conductive thin film being larger in area than the alignment mark to contrast with the plurality of second bumps forming the alignment marks during image processing using a recognition camera,

wherein each of the alignment marks comprises a plurality of second bumps formed simultaneously with the first bumps that do not contact said inspection electrodes, the plurality of second bumps positioned closely to one another.

2. The probe card according to claim 1, wherein the plurality of alignment marks includes at least two pairs of alignment marks formed on an outer periphery of a region where the first bumps for contact are formed, each pair of alignment marks comprising two alignment marks symmetric with respect to a center of the insulating thin film.