Active matrix light emitting device display pixel circuit and drive method

• US 7,589,707 B2
• Filed: 09/24/2005
• Issued: 09/15/2009
• Est. Priority Date: 09/24/2004
• Status: Expired due to Fees

• Current Assignee: Chen-Jean Chou
• Original Assignee: Chen-Jean Chou
• Inventors: Chou, Chen-Jean
• Primary Examiner(s): Mengistu; Amare
• Assistant Examiner(s): ZHOU, HONG
• Application Number:
  US11/162,826
• Publication Number:
  US 20060066527A1
• Time in Patent Office: 1,452 Days
• Field of Search: 345 81- 83, 345/87, 345 92- 93, 345/76, 345/67, 315/169.1, 315/169.3, 315/169.4
• US Class Current: 345/92
• CPC Class Codes: G09G 2300/0417 Special arrangements specific to the use of low carrier mobility technology
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0847 being a dynamic memory without any storage capacitor, i.e. with use of parasitic capacitances as storage elements
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/0251 Precharge or discharge of pixel before applying new pixel voltage
• CPC Class Codes: G09G 2310/0256 with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3241 the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror

Abstract

Display pixel circuits and a drive scheme utilizing a switching element operating in reverse direction in a data scan period to provide voltage reference are provided. Preferred embodiments and operation method leading to three-transistor solutions in current-control mode, common-cathode, and n-channel transistor drive configuration for light emitting device display are described.

Claims

1. A display comprising at least:

a data electrode;

a scanning electrode delivering at least a first and a second signals;

a reference voltage source;

a pixel connected to said data electrode, at least one said scanning electrode, and said reference voltage source;

said data electrode delivering data information to be displayed to said pixel;

said scan electrode selecting said pixel to receive said data information by carrying said first signal;

said pixel comprising at least;

a data setting transistor comprising a gate terminal, a second terminal and a third terminal;

a capacitor comprising a first end and a second end for holding a data voltage;

wherein said data setting transistor generates from said data information a data voltage at said first end of said capacitor during the period when said first signal is applied to said scan electrode;

wherein said scan electrode further sets the voltage of said second end of said capacitor to the same level as said scan electrode during the period when said first signal is applied to said scan electrode;

wherein said data setting transistor generates said data voltage from said data information;

wherein said data information is a data current;

wherein said data current is directed to flow in said data setting transistor via said second terminal and said third terminal of said data setting transistor.

2. The display according to claim 1, wherein said data setting transistor generates said data voltage at said gate of said data setting transistor, and at said first end of said capacitor.

3. The display according to claim 1, wherein said data setting transistor further generates said data voltage at said gate and at said second terminal of said data setting transistor.

4. The display according to claim 1, wherein said data setting transistor inhibits data current during the period when said second signal is applied to said scan electrode.

5. The display according to claim 1, wherein said pixel comprises in further detail at least:

a first transistor comprising a gate terminal, a second terminal and a third terminal;

a second transistor comprising a gate terminal, a second terminal and a third terminal;

wherein said second transistor is said data setting transistor;

wherein said scan electrode sets said second end of said capacitor to said first signal via a conducting path connecting said second end of said capacitor and said scan electrode via said first transistor during the period when said first signal is applied to said scan electrode.

6. The display according to claim 5, wherein said first transistor regulates a drive current directed to said first transistor according to said data voltage.

7. The display according to claim 5, wherein said pixel further comprises a light emitting element;

wherein said first transistor regulates a drive current directed to said light emitting element via said first transistor according to said data voltage.

8. The display according to claim 5, wherein

said first end of said capacitor, the gate of said first transistor and the gate of said second transistor are connected together;

wherein

said second end of said second terminal of said first transistor are connected together;

wherein said gate of said second transistor and said second terminal of said second transistor are connected; and

wherein said third terminal of said first transistor and said third terminal of said second transistor are connected.

9. The display according to claim 8, wherein said pixel further comprises a light emitting element, wherein said light emitting element is connected to said second terminal of said first transistor.

10. The display according to claim 5, wherein said pixel further comprises:

a light emitting element, said light emitting element emits light according to a drive current directed thereto;

a third transistor comprising a gate terminal, a second terminal and a third terminal;

wherein said first transistor regulates a drive current directed to said light emitting element via said first transistor according to said data voltage;

wherein said third transistor is turned on by said scan electrode carrying said first signal, allowing a data current to enter said pixel;

wherein said data current is directed to said second (data setting) transistor;

wherein said second transistor generates a data voltage at the gate of said second transistor according to said data current;

said data voltage being directed at said first end of said capacitor, and at the gate of said first transistor.

11. The display according to claim 5 wherein said pixel further comprises:

a third transistor comprising a gate terminal, a second terminal and a third terminal;

wherein said pixel circuit is connected according to the followings;

said first end of said capacitor being connected to the gate of said first transistor, and to the gate of said second transistor;

said second end of said capacitor being connected to said second terminal of said first transistor;

said third transistor being connected between said data electrode and said first end of said capacitor, via said second terminal and said third terminal of said third transistor;

said third terminal of said second transistor being connected to said scan electrode.

12. The display according to claim 11, wherein said second terminal of said second transistor is connected to said first end of said capacitor.

13. The display according to claim 12, wherein said gate of said third transistor is connected to said scan electrode.

14. The display according to claim 12, wherein said gate of said third transistor is connected to said second terminal of said third transistor.

15. The display according to claim 11, wherein said third terminal of said first transistor is connected to said scan electrode.

16. The display according to claim 11, wherein said third terminal of said first transistor is connected to a drive voltage during a drive period, and connected to a voltage the same as the first signal during a scanning period.

17. The display according to claim 11, wherein said pixel further comprises a light emitting element, wherein said light emitting element is connected to said second terminal of said first transistor.

18. A display comprising at least:

a data electrode;

a scanning electrode delivering at least a first and a second signals;

a reference voltage source;

a pixel connected to said data electrode, at least one said scanning electrode, and said reference voltage source;

said data electrode delivering data information to be displayed to said pixel;

said scan electrode selecting said pixel to receive said data information by carrying said first signal during a scanning period;

said pixel comprising at least;

a conducting channel between said data electrode and said scan electrode;

a storage element comprising a first end and a second end for holding a data voltage;

wherein said first end of said storage element is connected to a voltage node on said conducting channel;

a first transistor comprising a gate terminal, a second terminal and a third terminal;

wherein said conducting channel is enabled by said scan electrode carrying said first signal during a scan period, whereby conducts a data current directed from said data electrode to said scan electrode;

wherein said conducting channel generates from said data current a data voltage at said first end of said storage element during the period when said first signal is applied to said scan electrode;

wherein said conducting channel is disabled by said scan electrode carrying said second signal, inhibiting data current flow, whereby isolating said pixel from said data electrode;

wherein said second end of said storage element is set to the voltage of said scan electrode during the period when said first signal is applied to said scan electrode;

wherein said scan electrode sets the voltage of said second end of said storage element via said first transistor;

wherein said first transistor connects said scan electrode and said second end of said storage element via said second terminal and said third terminal of said first transistor.

19. The display according to claim 18, wherein said conducting channel comprises a conversion element;

said conversion element generates from said data current a data voltage at said voltage node.

20. The display according to claim 18, wherein said conducting channel comprises a data setting (second) transistor comprising a gate terminal, a second terminal and a third terminal;

wherein said data setting transistor generates a data voltage from said data current, and wherein said gate of said data setting transistor is said voltage node.

21. The display according to claim 18, wherein said second end of said storage element is connected to said second terminal of said first transistor;

wherein said second terminal operates as a drain terminal of said first transistor during a scanning period when said first signal is applied to said scan electrode;

wherein said second terminal operates as a source terminal during a drive period when said second signal is applied to said scan electrode.

22. The display according to claim 18 wherein said pixel further comprises a light emitting element;

wherein said first transistor is a drive transistor, regulating a drive current directed to said light emitting element via said first transistor according to said data voltage set on said storage element.

23. The display according to claim 22, wherein said drive current is directed from said scan-electrode via said first transistor.

24. The method for driving the display according claim 18 comprising the steps of:

applying said first signal to said scan electrode, enabling said conducting channel in selected pixels formatting data information in data current and delivering said data current via said data electrode;

allowing a data writing in selected pixel to set the storage element in said pixel to a generated data voltage;

applying a second signal inhibiting said conducting channel;

maintaining said second signal to deliver a drive current to said light emitting element via scan electrode and said first transistor.

25. A display comprising:

a data electrode providing data input;

a pixel comprising;

a data setting circuit for converting a data in nut to a data voltage;

a storage element comprising a first end and a second end;

said first end being connected to said data setting circuit to receive said data voltage,

a transistor comprising a high impedance control terminal, a second terminal and a third terminal;

wherein said data setting circuit sets the data voltage to said storage element when a data input is converted to a data voltage;

wherein said second terminal of said transistor is connected to said second end of said storage element;

wherein said transistor further sets the voltage at said second end of said storage element the same as said third terminal of said transistor during the period when said data setting circuit sets a data voltage of the storage element;

wherein said data input is a data current directed via said data electrode to said data setting circuit, and wherein said data setting circuit converts said data current to a data voltage.

26. The display according to claim 25 wherein said data setting circuit conducts said data current.

27. The display according to claim 26, wherein said data setting circuit comprises a data setting transistor having a gate, a second terminal, and a third terminal;

wherein said data setting circuit converting said data current to a data voltage generates said data voltage at said gate of said data setting transistor.

28. A display comprising at least a pixel, said pixel comprising a control circuit having a data input end, a drive output end, and a pixel select end;

wherein said control circuit further comprises;

a first transistor comprising a gate terminal, a second terminal, and a third terminal;

a second transistor comprising a gate terminal, a second terminal, and a third terminal;

a storage element having a first end and a second end;

wherein said gate of said first transistor, said gate of said second transistor, said second terminal of said second transistor, said first end of said storage element are connected in common with said data input end;

wherein said second end of said storage element, said second terminal of said first transistor are connected in common with said drive output end;

wherein said third terminals of said first transistor and said second transistor are connected in common with said pixel select end;

wherein said display further comprising;

a switching element having a gate, a second terminal, and a third terminal;

a data electrode for delivering data information to said pixel;

wherein said data electrode is connected to said data input end via said switching element;

wherein said data input end is connected directly to said third terminal of said switching element;

wherein said second transistor and said switching element are set to conducting state simultaneously by applying a control signal to said pixel select end.

29. The display according to claim 28 further comprising a scan electrode for selecting pixel for data input;

said scan electrode being connected to said pixel select end;

wherein said second transistor and said switching element are set to conducting state simultaneously by applying a control signal to said pixel select end via said scan electrode.

30. The display according to claim 29 further comprising a light emitting element comprising a first end and a second end;

wherein said first end of said light emitting element is connected to said drive output end.