Low complexity high-speed communications transceiver

• US 7,590,168 B2
• Filed: 09/26/2001
• Issued: 09/15/2009
• Est. Priority Date: 07/11/2001
• Status: Expired due to Fees

• Current Assignee: Entropic Communications, LLC (FIG LLC (d/b/a Fortress Investment Group LLC))
• Original Assignee: Entropic Communications Incorporated (Maxlinear Incorporated)
• Inventors: Manickam, Thulasinath G., Sallaway, Peter J., Raghavan, Sreen A.
• Primary Examiner(s): Bocure; Tesfaldet
• Assistant Examiner(s): Williams; Lawrence B
• Application Number:
  US09/965,242
• Publication Number:
  US 20030081693A1
• Time in Patent Office: 2,911 Days
• Field of Search: 375/242, 375259-285, 375/324, 375/340, 375/219, 375/220, 375/222, 375/257, 375/358, 370/278, 370/464, 370478-545, 370/57, 370/281, 370/282, 370/295, 370/302, 370/343, 370/436, 370/593, 332/103, 332/203, 341/59, 329300-310, 329347-372, 359/325, 455/21, 455/39, 455/293, 455/309, 455/312, 455337-338
• US Class Current: 375/219
• CPC Class Codes: H04L 27/2601 Multicarrier modulation systems

Abstract

A communication system is disclosed that allows high data-rate transmission of data between components. N-bit parallel data is transmitted in K-frequency separated channels on the transmission medium so as to fully take advantage of the overall bandwidth of the transmission medium. As a result, a very high data-rate transmission can be accomplished with low data-bit transmission on individual channels. A transmitter system and a receiver system are described for the communication system.

Claims

1. A serial/deserializer transmission system, comprising:

a plurality of demodulators, each of the plurality of demodulators receiving signals from one of a plurality of transmission bands that are transmitted on a single electrically differential conductive pair, at least one of the plurality of demodulators comprising;

an analog down converter that converts an input signal from the one of the plurality of transmission bands to a base band;

a filter coupled to receive signals from the down converter, the filter substantially filtering out signals not in the base band;

an analog-to-digital converter coupled to receive signals from the filter and generate digitized signals;

an equalizer coupled to receive the digitized signals; and

a decoder coupled to receive signals from the equalizer and generate recreated data, the recreated data being substantially the same data transmitted by a corresponding modulator,

wherein the plurality of demodulators recover a plurality of bits synchronously distributed across the plurality of transmission bands in the serial/deserializer transmission system, the plurality of demodulators being synchronous to each other.

2. The system of claim 1, wherein the analog down-converter creates an in-phase signal and a quadrature signal, the in-phase signal being the input signal multiplied by a cosine function at the frequency of the one of the plurality of transmission bands and the quadrature signal being the input signal multiplied by a sine function at the frequency of the one of the plurality of transmission bands corresponding to that one of the plurality of demodulators.

3. The system of claim 2, wherein the filter includes an in-phase filter filtering the in-phase signal and a quadrature filter filtering the quadrature signal.

4. The system of claim 3, further including an offset block coupled between the down-converter and the filter, the offset block offsetting the in-phase signal and the quadrature signal such that signals output from the analog-to-digital converter averages zero.

5. The system of claim 2, further including an amplifier coupled between the filter and the analog-to-digital converter, the amplifier amplifying an in-phase filtered signal from the in-phase filter and a quadrature filter signal from the quadrature filter such that the analog-to-digital converter is filled.

6. The system of claim 5, wherein an in-phase gain of the amplifier and the quadrature gain of the amplifier are adaptively chosen in an automatic gain controller.

7. The system of claim 6, wherein the automatic gain controller sets the in-phase gain and the quadrature gain based on the digitized signals from the analog to digital converters.

8. The system of claim 7, wherein the in-phase gain and the quadrature gain are equal.

9. The system of claim 2, wherein the analog-to-digital converter includes a first analog-to-digital converter coupled to receive signals from the in-phase filter and a second analog-to-digital converter coupled to receive signals from the quadrature filter.

10. The system of claim 9, further including a correction circuit coupled between the analog-to-digital converter and the equalizer.

11. The system of claim 10, wherein the correction circuit includes an adjustment to correct phases between the in-phase signal and the quadrature signal.

12. The system of claim 11, wherein a small portion of one of the in-phase signal and the quadrature signal are added to the opposite one of the in-phase signal and the quadrature signal.

13. The system of claim 12, wherein a second portion of the opposite one of the in-phase signal and the quadrature signal is added to the opposite one of the in-phase signal and the quadrature signal.

14. The system of claim 13, wherein the small portion and the second portion are adaptively chosen.

15. The system of claim 14, wherein the small portion is a function of in-phase and quadrature output signals from the correction circuit.

16. The system of claim 14, wherein the second portion is a function of the ratio between in-phase and quadrature signals from the correction circuit.

17. The system of claim 2, wherein a phase rotator circuit is coupled between the analog-to-digital converter and the equalizer.

18. The system of claim 17, wherein a parameter of the phase rotator circuit is adaptively chosen.

19. The system of claim 2, wherein an amplifier is coupled between the equalizer and the decoder.

20. The system of claim 19, wherein a quadrature correction is coupled between the amplifier and the decoder.

21. The system of claim 20, wherein an offset circuit is coupled between the quadrature correction and the decoder.

22. The system of claim 19, wherein an in-phase gain and a quadrature gain of the amplifier are adaptively chosen from error signals calculated from sliced values.

23. The system of claim 22, wherein the sliced values are determined from input signals to the decoder.

24. The system of claim 20, wherein a parameter of the quadrature correction is adaptively chosen.

25. The system of claim 21, wherein a parameter of the offset circuit is adaptively chosen.

26. The system of claim 1, wherein C_k^x(0) is one and C_k^y(0) is zero.

27. The system of claim 26, wherein the parameters C_k^x(−

1) is one and C_k^y(−

1) are fixed.

28. The system of claim 27, wherein the parameter C_k^x(−

1) is about −

0.3125.

29. The system of claim 27, wherein the parameter C_k^y(−

1) is about −

0.015625.

30. A method of receiving data in a serial/deserializer system, comprising:

receiving an input signal into a plurality of demodulators coupled to a single conducting differential pair, each of the plurality of demodulators receiving signals from one of a plurality of transmission bands synchronously with others of the plurality of demodulators, a plurality of bits of the received input signal having been synchronously encoded and transmitted across the plurality of transmission bands, each of the plurality of demodulators performing the functions of;

analog down-converting the input signal to obtain a base band signal corresponding to one of the respective plurality of transmission bands;

filtering the base band signal to remove signals not in the base band;

digitizing the filtered base band signal to obtain a digitized signal;

equalizing the digitized signal, wherein equalizing is accomplished using a complex equalizer executing a transfer function, the transfer function having parameters C_k^x(j) and C_k^y(j), where x, y, k, and j are integers;

wherein the parameters C_k^x(0) and C_k^y(0) are fixed to avoid interaction with an adaptation of gain coefficients used in an amplifier and a carrier phase rotation performed in a phase rotator; and

decoding the equalized signal to recover data that is substantially the same as that transmitted by a corresponding modulator in a transmitter, wherein the plurality of bits synchronously transmitted across the plurality of transmission bands of the serial/deserializer system is recovered,

wherein operating parameters of at least one of the down-converting, the filtering, the digitizing and equalizing are adaptively chosen.

31. The method of claim 30, wherein down-converting the input signal includes:

multiplying the input signal by a cosine function at the frequency of the one of the plurality of transmission bands to obtain an in-phase signal; and

multiplying the input signal by a sine function at the frequency of the one of the plurality of transmission bands to obtain a quadrature signal,

wherein the base band signal includes the in-phase signal and the quadrature signal.

32. The method of claim 30, further including:

offsetting the base band signal so that the averaged digitized signal is zero; and

amplifying the base band signal so that a full range of the digitized signal is obtained.

33. The method of claim 31, further including adjusting the phase between the in-phase signal and the quadrature signal of the base band signal.

34. The method of claim 31, further including providing a quadrature correction.

35. The method of claim 31, further including slicing recovered data.

36. The method of claim 30, further including adaptively choosing at least one operating parameter.

37. A receiver system in a serial/deserializer system, comprising:

means for receiving an input signal from a single conductive differential pair, the input signal including a plurality of transmission bands; and

for each of the plurality of transmission band;

means for down-converting the input signal to a base-band signal;

means for obtaining a digital signal from the base-band signal;

means for equalizing the digital signal, wherein equalizing is accomplished using a complex equalizer executing a transfer function, the transfer function having parameters C_k^x(j) and C_k^y(j), where x, y, k, and j are integers;

wherein the parameters C_k^x(0) and C_k^y(0) are fixed to avoid interaction with an adaptation of gain coefficients used in an amplifier and a carrier phase rotation performed in a phase rotator; and

means for decoding the equalized signal to recover data transmitted by a corresponding modulator in a transmitter coupled to the single conductive differential pair,

wherein a plurality of bits that were synchronously transmitted across the plurality of transmission bands is recovered, and the means for down-converting, means for obtaining, and means for equalizing, and means for decoding for each of the plurality of transmission bands are synchronous to each other; and

wherein operating parameters of at least one of the means for down-converting, the means for filtering, the means for obtaining a digital signal, and means for equalizing are adaptively chosen.