Public key cryptographic method of protecting an electronic chip against fraud
First Claim
1. An asymmetrical cryptographic method for protecting a hard-wired electronic logic chip against fraud in transactions between the hard-wired electronic chip and an application, including calculating an authentication value V from input parameters in the electronic chip, said method comprising the steps of:
- producing at least one pseudo-random number r at the application before the hard-wired electronic chip is placed into circulation;
calculating, at the application before the hard-wired electronic chip is placed into circulation, parameters x corresponding to the at least one pseudo random number r, each corresponding parameter x being linked to the pseudo random number r by a mathematical relationship;
storing the corresponding parameter x in a data memory of the electronic chip before the hard-wired electronic chip is placed into circulation;
producing, at the chip, the pseudo-random number r specific to the transaction via a serial pseudo-random generator included in the hard-wired electronic chip, said hard-wired electronic chip reading the stored corresponding parameter x calculated by the application before the hard-wired electronic chip is placed into circulation;
sending from the hard-wired electronic chip to the application the corresponding parameter x calculated by the application, before the hard-wired electronic chip is placed into circulation, which is linked to the pseudo-random number r by the mathematical relationship and stored in the data memory of the hard-wired electronic chip;
calculating, at the hard-wired electronic chip, a parameter y constituting an entire or a portion of the authentication value V via a serial function whose input parameters are at least the random number r specific to the transaction and a private key s belonging to an asymmetrical pair of keys;
sending the authentication value V from the hard-wired electronic chip to the application; and
verifying, at the application, said authentication value V via a verification function whose input parameters consist of public parameters including at least a public key p.
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Accused Products
Abstract
An asymmetrical cryptographic method of protecting an electronic chip against fraud in transactions between the electronic chip and an application, involving calculating an authentication value V from input parameters in the electronic chip. The chip produces a pseudo-random number r specific to the transaction by means of a serial pseudo-random generator included in the chip. The chip sends the application a parameter x calculated by the application prior to the transaction, linked to the random number r by a mathematical relationship, and stored in a data memory of the chip. The chip calculates a parameter y constituting the whole or a portion of the authentication value V by means of a serial function whose input parameters are at least the random number r specific to the transaction and a private key s belonging to an asymmetrical pair of keys. The chip sends the authentication value V to the application, and the application verifies the authentication value V by means of a verification function whose input parameters consist exclusively of public parameters including at least the public key p.
18 Citations
32 Claims
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1. An asymmetrical cryptographic method for protecting a hard-wired electronic logic chip against fraud in transactions between the hard-wired electronic chip and an application, including calculating an authentication value V from input parameters in the electronic chip, said method comprising the steps of:
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producing at least one pseudo-random number r at the application before the hard-wired electronic chip is placed into circulation; calculating, at the application before the hard-wired electronic chip is placed into circulation, parameters x corresponding to the at least one pseudo random number r, each corresponding parameter x being linked to the pseudo random number r by a mathematical relationship; storing the corresponding parameter x in a data memory of the electronic chip before the hard-wired electronic chip is placed into circulation; producing, at the chip, the pseudo-random number r specific to the transaction via a serial pseudo-random generator included in the hard-wired electronic chip, said hard-wired electronic chip reading the stored corresponding parameter x calculated by the application before the hard-wired electronic chip is placed into circulation; sending from the hard-wired electronic chip to the application the corresponding parameter x calculated by the application, before the hard-wired electronic chip is placed into circulation, which is linked to the pseudo-random number r by the mathematical relationship and stored in the data memory of the hard-wired electronic chip; calculating, at the hard-wired electronic chip, a parameter y constituting an entire or a portion of the authentication value V via a serial function whose input parameters are at least the random number r specific to the transaction and a private key s belonging to an asymmetrical pair of keys; sending the authentication value V from the hard-wired electronic chip to the application; and verifying, at the application, said authentication value V via a verification function whose input parameters consist of public parameters including at least a public key p. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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32. A device including a hard-wired electronic chip and configured to implement an asymmetrical cryptographic method for protecting the hard-wired electronic chip against fraud in transactions between the hard-wired electronic chip and an application, said hard-wired electronic chip reading one or more stored values of a parameter x calculated by the application before the hard-wired electronic chip is placed into circulation, and said parameter x being linked by a mathematical relationship to a value of a random number r, the method comprising the hard-wired electronic chip calculating an authentication value V from input parameters, and said device comprising:
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a serial pseudo-random generator for producing a random number r specific to a transaction; first memory means for storing in the hard-wired electronic chip, before the hard-wired electronic chip is placed into circulation, the one or more values of the parameter x calculated by the application before the hard-wired electronic chip is placed into circulation and which are linked by the mathematical relationship to the value of the random number r; means for sending the parameter x linked to the random number r specific to the transaction from the hard-wired electronic chip to the application; means for executing a serial function having as input parameters at least the random number r specific to the transaction and a private key s belonging to an asymmetrical pair of keys and providing as output a parameter y; and output means configured to construct an authentication value V from at least the parameter y.
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Specification