High density hybrid MOSFET device

• US 7,592,650 B2
• Filed: 09/11/2005
• Issued: 09/22/2009
• Est. Priority Date: 06/06/2005
• Status: Expired due to Fees

• Current Assignee: M-Mos Sdn., Bhd., M-Mos Semiconductor Sdn. Bhd.
• Original Assignee: M-Mos Semiconductor Sdn. Bhd.
• Inventors: Hshieh, Fwu-Iuan
• Primary Examiner(s): Andújar; Leonardo
• Assistant Examiner(s): Harrison; Monica D
• Application Number:
  US11/223,621
• Publication Number:
  US 20060273383A1
• Time in Patent Office: 1,472 Days
• Field of Search: 257/341, 257/294, 257/123, 257/226, 257/E31.096, 257/E27.137, 257/E27.144, 257/E27.161, 257/E25.029, 257/E21.397
• US Class Current: 257/226
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/48624 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48655 Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 2224/48724 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48755 Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 2224/4903 Connectors having different sizes, e.g. different diameters
• CPC Class Codes: H01L 2224/49051 Connectors having different shapes
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73221 Strap and wire connectors
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 24/26 Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 29/0696 : of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/41766 : with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/456 : on silicon
• CPC Class Codes: H01L 29/66727 : with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 : with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7828 : without inversion channel, e.g. vertical ACCUFETs, normally-on vertical MISFETs
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01018 : Argon [Ar]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/20755 : larger or equal to 50 microns less than 60 microns
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns
• CPC Class Codes: H01L 2924/30105 : Capacitance

Abstract

A hybrid semiconductor power device that includes a plurality of closed power transistor cells each surrounded by a first and second trenched gates constituting substantially a closed cell and a plurality of stripe cells comprising two substantially parallel trenched gates constituting substantially an elongated stripe cell wherein the closed cells and stripe cells constituting neighboring cells sharing trenched gates disposed thereinbetween as common boundary trenched gates. The closed MOSFET cell further includes a source contact disposed substantially at a center portion of the closed cell wherein the trenched gates are maintained a critical distance (CD) away from the source contact.

Claims

1. A hybrid metal oxide semiconductor field effect transistor (MOSFET) device comprising:

a closed MOSFET cell surrounded by a first and second trenched gates constituting substantially a square cell with said first and second trenches separated with a narrow distance to leave a first and a second open ends on two opposite sides of said square cell and said first and second trenched gates further extending from said first and second open ends with said narrow distance between the first and second extended trenched gates substantially in parallel for constituting a first and second elongated stripe MOSFET cells extended from said two opposite sides of said substantially square cell whereby forming said hybrid MOSFET device with said square MOSFET cells hybrid with said elongated strip MOSFET cells.

2. The MOSFET device of claim 1 wherein:

said closed MOSFET cell further comprising a source contact disposed substantially at a center portion of said square cell wherein said first and second trenched gate maintaining a critical distance (CD) away from said source contact.

3. The MOSFET device of claim 2 wherein:

said source contact further constituting a trenched source contact comprising a source contact plug filling in a source-body contact trench opened in an insulation layer covering said closed MOSFET cell and said source-body contact trench further extended into a source region below said insulation layer and a body region below said source region extended. between said first and second trenched gates of said closed MOSFET cell.

4. The MOSFET device of claim 3 further comprising:

a source metal layer disposed above sad insulation layer and electrically contact said source contact plug.

5. The MOSFET device of claim 3 wherein:

the source contact plug further comprising a Ti/TiN barrier layer surrounding a tungsten core as a source-body contact metal.

6. The MOSFET device of claim 3 further comprising:

a thin resistance-reduction conductive layer disposed on a top surface covering said insulation layer and contacting said source contact plug whereby said resistance-reduction conductive layer having a greater area than a top surface of said contact metal plug for reducing a source-body resistance.

7. The MOSFET device of claim 6 wherein:

said thin resistance-reduction conductive layer comprising a titanium (Ti) layer.

8. The MOSFET device of claim 6 wherein:

said thin resistance-reduction conductive layer comprising a titanium nitride (Ti/TiN) layer.

9. The MOSFET device of claim 3 wherein:

said source contact plug filled in said source body contact trench comprising a substantially cylindrical shaped plug.

10. The MOSFET device of claim 9 further comprising:

a thick front metal layer disposed on top of said resistance-reduction layer for providing a contact layer for a wire or wireless bonding package.

11. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an aluminum layer.

12. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an AlCu layer.

13. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an AlCuSi layer.

14. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an Al/NiAu layer.

15. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an AlCu/NiAu layer.

16. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an AlCuSi/NiAu layer.

17. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an NiAg layer.

18. The MOSFET device of claim 10 wherein:

said front thick metal layer comprising an NiAu layer.

19. The MOSFET device of claim 2 further comprising:

a drain electrode disposed below said body region for transmitting a source to drain current.

20. The MOSFET device of claim 1 wherein:

said stripe cell further comprising a stripe AccuFET cell.

21. The MOSFET device of claim 1 wherein:

said MOSFET cell further comprising a N-channel MOSFET cell.

22. The MOSFET device of claim 1 wherein:

said MOSFET cell further comprising a P-channel MOSFET cell.

23. A hybrid semiconductor power device comprising:

a plurality of closed power transistor cells each surrounded by a first and second trenched gates constituting substantially a closed cell with said first and second trenches separated with a narrow distance to leave a first and a second open ends on two opposite sides of said square cell and said first and second trenched gates further extending from said first and second open ends with said narrow distance between the first and second trenched gates thus constituting a plurality of elongated stripe cells extended from said two opposite sides of said substantially square cell whereby forming a hybrid configuration with said square cells and elongated strip cells.

24. The hybrid semiconductor power device of claim 23 wherein:

said closed MOSFET cell further comprising a source contact disposed substantially at a center portion of said closed cell wherein said trenched gates maintaining a critical distance (CD) away from said source contact.

25. The hybrid semiconductor power device of claim 24 wherein:

said source contact further constituting a trenched source contact comprising a source contact plug filling in a source-body contact trench opened in an insulation layer covering said closed cell and said source-body contact trench further extended into a source region below said insulation layer and a body region below said source region extended between said first and second trenched gates of said closed cell.

26. The hybrid semiconductor power device of claim 25 wherein:

the source contact plug further comprising a Ti/TiN barrier layer surrounding a tungsten core as a source-body contact metal.

27. The hybrid semiconductor power device of claim 25 further comprising:

a thin resistance-reduction conductive layer disposed on a top surface covering said insulation layer and contacting said source contact plug whereby said resistance-reduction conductive layer having a greater area than a top surface of said contact metal plug for reducing a source-body resistance.

28. The hybrid semiconductor power device of claim 24 further comprising:

a source metal layer disposed above sad insulation layer and electrically contact said source contact plug.

29. The hybrid semiconductor power device of claim 23 further comprising:

a drain electrode disposed below said body region for transmitting a source to drain current.

30. The hybrid semiconductor power device of claim 23 wherein:

said hybrid semiconductor power device further comprising a N-channel MOSFET cell.

31. The hybrid semiconductor power device of claim 23 wherein:

said hybrid semiconductor power device further comprising a P-channel MOSFET cell.

32. The hybrid semiconductor power device of claim 23 wherein:

said stripe cell further comprising a stripe AccuFET cell.

33. A semiconductor power device comprising:

a plurality of substantially closed cells and stripe cells constituting hybrid cell configuration with said stripe cells extending from four sides of said closed cell and four of said stripe cells surrounding and forming said closed cells wherein said stripe cells constituting an accumulation mode field effect transistor (AccuFET) cell; and

a source contact disposed substantially in a middle portion of said closed cells whereby said stripe cells constituting said AccuFET cells electrically connecting to said source contact through said closed cells adjacent to the stripe cells and having no direct source contact in said AccuFET cell and sharing a source contact with said closed cells as a neighboring cells.