Battery balancing including resonant frequency compensation

• US 7,592,775 B2
• Filed: 05/31/2006
• Issued: 09/22/2009
• Est. Priority Date: 05/31/2006
• Status: Active Grant

• Current Assignee: Frontgrade Technologies Incorporated
• Original Assignee: Aeroflex Plainview Incorporated (Cobham PLC)
• Inventors: Lissack, Tsvi, Altemose, George
• Primary Examiner(s): Tso; Edward
• Assistant Examiner(s): Piggush; Aaron
• Application Number:
  US11/443,151
• Publication Number:
  US 20070279003A1
• Time in Patent Office: 1,210 Days
• Field of Search: 320/118, 320/128, 320/134, 320/136, 324/427
• US Class Current: 320/128
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: H02M 3/335 using semiconductor devices only
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A system for balancing charge between a plurality of storage battery cells within a storage battery. The battery balancing system sense changes, possibly caused by environmental influences, in the overall resonant frequency of charge balancing circuits contained within the battery balancing system. Using a phase locked loop based controller, the battery balancing system compensates for the change in resonant frequency by driving the battery balancing circuits at a frequency that matches the actual sensed resonant frequency of the battery balancing circuits.

Claims

1. A device, comprising:

a plurality of balancing circuits, coupled to each of a plurality of coupled battery cells, that conduct current to and from the plurality of coupled battery cells;

a share bus, coupled to at least each of the plurality of balancing circuits; and

a phase locked loop controller, coupled to at least the share bus and the plurality of balancing circuits, that controls a driving frequency for the plurality of balancing circuits by detecting an overall resonant frequency of the plurality of balancing circuits through the share bus and adjusting the driving frequency produced by the phase locked loop controller to match the overall resonant frequency.

2. The device of claim 1, wherein the plurality of coupled battery cells are serially connected battery banks, each battery bank being made up of one or more battery cells connected in parallel.

3. The device of claim 1, wherein the balancing circuits conduct current from overcharged battery cells to undercharged battery cells.

4. The device of claim 1, wherein the phase locked loop controller is composed within at least one of an ASIC, FPGA or MCM device.

5. The device of claim 1, wherein the phase locked loop controller is composed of separate components.

6. The device of claim 1, wherein the phase locked loop controller is composed as a software process running within a microprocessor.

7. The device of claim 1, wherein the balancing circuits are composed of at least one fly-back regulator.

8. The device of claim 7, wherein the phased locked loop controller has a duty cycle that is exactly 50% of the drive frequency waveform.

9. The device of claim 8, wherein the phased locked loop controller measures the zero crossing time of the fly-back cycle and equates it to a forward half period of the drive frequency waveform.

10. A method, comprising:

detecting an overall resonant frequency of a plurality of balancing circuits in a battery balancing system, each of the balancing circuits being coupled to at least a share bus and a battery cell; and

adjusting a driving frequency that drives the plurality of battery balancing circuits to match the overall resonant frequency, the driving frequency being produced by a phase locked loop controller coupled to at least the share bus and the plurality of battery balancing circuits.

11. The method of claim 10, wherein the detecting occurs by measuring a waveform created by battery balancing circuits on the share bus.

12. The method of claim 11, wherein the battery balancing circuits include at least a fly-back regulator.

13. The method of claim 12, wherein the phased locked loop controller has a duty cycle that is exactly 50% of the drive frequency waveform.

14. The method of claim 13, wherein the phased locked loop controller measures the zero crossing time of the fly-back cycle and equates it to a forward half period of the drive frequency waveform.

15. A system, comprising:

a battery balancing system including a plurality of balancing circuits,

coupled to each of a plurality of coupled battery cells, that conduct current to and from the plurality of battery cells;

a share bus, coupled to at least each of the plurality of balancing circuits; and

a phase locked loop controller, coupled to at least the share bus and the plurality of balancing circuits, that controls a driving frequency for the plurality of balancing circuits by detecting an overall resonant frequency of the plurality of balancing circuits through the share bus and adjusting a driving frequency produced by the phase locked loop controller to match the overall resonant frequency.

16. The system of claim 15, wherein the battery balancing circuits include at least a fly-back regulator.

17. The system of claim 16, wherein the phased locked loop controller has a duty cycle that is exactly 50% of the drive frequency waveform.

18. The system of claim 17, wherein the phased locked loop controller measures the zero crossing time of the fly-back cycle and equates it to a forward half period of the drive frequency waveform.