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On-chip storage of secret information as inverse pair

  • US 7,592,829 B2
  • Filed: 12/02/2003
  • Issued: 09/22/2009
  • Est. Priority Date: 12/02/2002
  • Status: Expired due to Fees
First Claim
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1. An integrated circuit comprising a processor and memory storing:

  • secret information accessible via a first address, the secret information comprising a string of bit values;

    an inverse-string accessible via a second address, the inverse-string comprising a string of bit values, wherein each of the bit values in the inverse-string is the logical inverse of a bit value at a corresponding bit position in the secret information, the integrated circuit being programmed with code configured to;

    (i) receive a request for the secret information; and

    (ii) test whether the bit-values of the inverse string are the inverse of the bit-values at respective corresponding bit positions of the secret information by combining the corresponding bits of the secret information and the inverse-string.

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  • 3 Assignments
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