On-chip storage of secret information as inverse pair
First Claim
1. An integrated circuit comprising a processor and memory storing:
- secret information accessible via a first address, the secret information comprising a string of bit values;
an inverse-string accessible via a second address, the inverse-string comprising a string of bit values, wherein each of the bit values in the inverse-string is the logical inverse of a bit value at a corresponding bit position in the secret information, the integrated circuit being programmed with code configured to;
(i) receive a request for the secret information; and
(ii) test whether the bit-values of the inverse string are the inverse of the bit-values at respective corresponding bit positions of the secret information by combining the corresponding bits of the secret information and the inverse-string.
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Accused Products
Abstract
An integrated circuit comprising a processor and memory storing: secret information accessible via a first address, the secret information comprising a string of bit values; an inverse-string accessible via a second address, the inverse-string comprising a string of bit values, wherein each of the bit values in the inverse-string is the logical inverse of a bit value at a corresponding bit position in the secret information, the integrated circuit being programmed with code configured to: (i) receive a request for the secret information; and (ii) test whether the bit-values of the inverse string are the inverse of the bit-values at respective corresponding bit positions of the secret information.
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Citations
17 Claims
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1. An integrated circuit comprising a processor and memory storing:
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secret information accessible via a first address, the secret information comprising a string of bit values; an inverse-string accessible via a second address, the inverse-string comprising a string of bit values, wherein each of the bit values in the inverse-string is the logical inverse of a bit value at a corresponding bit position in the secret information, the integrated circuit being programmed with code configured to; (i) receive a request for the secret information; and (ii) test whether the bit-values of the inverse string are the inverse of the bit-values at respective corresponding bit positions of the secret information by combining the corresponding bits of the secret information and the inverse-string. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of ensuring validity of secret information stored in a memory in the form of a string of bit values accessible via a first address, the memory also storing an inverse-string accessible via a second address, the inverse-string comprising a string of bit values that are the logical inverses of the bit values at corresponding respective bit positions of the secret information, the method including the steps of:
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receiving a request for the secret information; and testing whether the bit-values of the inverse string are the inverse of the bit-values at respective corresponding bit positions of the secret information by combining the corresponding bits of the secret information and the inverse-string. - View Dependent Claims (13, 14, 15, 16, 17)
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Specification