Intelligent method for DC bus voltage ripple compensation for power conversion units

• US 7,593,243 B2
• Filed: 10/09/2006
• Issued: 09/22/2009
• Est. Priority Date: 10/09/2006
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Ganev, Evgeni, Warr, William H., Johnson, Edward L.
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US11/539,871
• Publication Number:
  US 20080084716A1
• Time in Patent Office: 1,079 Days
• Field of Search: 363/36, 363/40, 363/44, 363/65, 363/67, 363/71, 363/72
• US Class Current: 363/44
• CPC Class Codes: H02M 1/14 Arrangements for reducing ripples from dc input or output

Abstract

A power conversion system having a DC power distribution bus includes multiple power converters connected to the DC power distribution bus with modulation frequencies synchronized so that providing phase shifts between the different modulations has the effect of compensating voltage and current ripples, e.g., reducing voltage fluctuations, across the DC bus. Power conversion may be controlled using space vector modulation implemented, for example, by any of a variety of pulse width modulation schemes. Phase shifts in which nulls of the modulation cycles of different converters do not overlap (in the time domain) may be particularly effective for DC bus voltage ripple compensation. The novel method for DC bus voltage ripple compensation may be implemented by programming a digital signal processor to control the power converters.

Claims

1. A power conversion system having a DC power distribution bus, comprising:

a first converter and a second converter, each connected to the DC power distribution bus;

a first controller connected to the first converter and controlling the first converter using space vector modulation modulating space vector modulation frames associated with an output signal of the first converter;

a second controller connected to the second converter and controlling the second converter using space vector modulation modulating space vector modulation frames associated with an output signal of the second converter, wherein;

the second controller space vector modulation frames are synchronized to the first controller space vector modulation frames; and

the second controller space vector modulation frames are phase shifted relative to the first controller space vector modulation frames.

2. The system of claim 1, wherein:

the second controller space vector modulation frames are phase shifted by a non-zero phase shift that is not an integral multiple of 180 degrees.

3. The system of claim 1, wherein:

the second controller space vector modulation frames have a constant phase shift from the first controller space vector modulation frames.

4. The system of claim 1, wherein:

the second controller space vector modulation frames have a changing phase shift from the first controller space vector modulation frames.

5. The system of claim 1, wherein:

the first controller implements space vector modulation using a first pulse width modulation of the first converter; and

the second controller implements space vector modulation using a second pulse width modulation of the second converter so that nulls of the first converter overlap non-nulls of the second converter.

6. The system of claim 1, wherein:

the first controller is a digital signal processor that synchronizes the space vector modulation frames using a clock source to synchronize a counter and phase shifts the space vector modulation frames by adjusting a value of the counter.

7. A method of compensating voltage ripple, comprising the steps of:

synchronizing space vector modulation frames for at least two controllers, a first controller controlling a first converter and a second controller controlling a second converter, wherein the first and second converters are connected to a DC power distribution bus; and

phase shifting the space vector modulation frames for the first controller by a non-zero and non-integral multiple of π

relative to the space vector modulation frames for the second controller.

8. The method of claim 7, wherein:

the phase shifting reduces a first harmonic of AC current amplitude from the DC power distribution bus compared to no phase shifting.

9. The method of claim 7, wherein:

the synchronizing step includes;

synchronizing a first counter and a second counter to a clock source; and

transmitting a present value of the first counter to the second counter; and

the phase shifting step includes;

adding an offset to the present value; and

transmitting the offset to the second counter.

10. The method of claim 7, wherein the phase shifting step includes:

phase shifting by either less than half or more than half of a modulation frame.

11. The method of claim 7, further comprising the steps of:

controlling the first converter using pulse width modulation;

controlling the second converter using pulse width modulation; and

the phase shifting step includes;

phase shifting so that the nulls of the first converter do not overlap the nulls of the second converter.

12. A method for power conversion on a DC power distribution bus, comprising:

converting power at a first connection to the bus;

converting power at a second connection to the bus;

synchronizing the power conversion at the second connection to the power conversion at the first connection; and

phase shifting the power conversion at the second connection by a non-zero amount and non-integral multiple of π

relative to and to be out of phase with the power conversion at the first connection.

13. The method of claim 12, further comprising:

converting power at the first connection using a first space vector modulation;

converting power at the second connection using a second space vector modulation having modulation cycles synchronized to modulation cycles of the first space vector modulation; and

controlling DC bus voltage ripple by providing a constant phase shift from the modulation cycles of the first space vector modulation to the modulation cycles of the second space vector modulation.

14. The method of claim 12, further comprising:

converting power at the first connection using a first space vector modulation;

converting power at the second connection using a second space vector modulation having modulation cycles synchronized to modulation cycles of the first space vector modulation; and

controlling DC bus voltage ripple by adjusting the phase shift from the modulation cycles of the first space vector modulation to the modulation cycles of the second space vector modulation.

15. The method of claim 12, further comprising:

converting power at a third connection to the bus;

synchronizing the power conversion at the third connection to the power conversion at the first connection;

converting power at the first connection using a first space vector modulation;

converting power at the second connection using a second space vector modulation having modulation cycles synchronized to modulation cycles of the first space vector modulation;

converting power at the third connection using a third space vector modulation having modulation cycles synchronized to modulation cycles of the first space vector modulation; and

controlling DC bus voltage ripple by providing a distinct phase shift from the modulation cycles of the first space vector modulation for each of the modulation cycles of the second space vector modulation and the modulation cycles of the third space vector modulation.

16. The method of claim 12, further comprising:

converting power at the first connection using a first space vector modulation;

converting power at the second connection using a second space vector modulation having modulation cycles synchronized to modulation cycles of the first space vector modulation; and

controlling DC bus voltage ripple by providing a phase shift wherein nulls of the first space vector modulation are non-overlapping nulls of the second space vector modulation.