Virtual memory mapping for efficient memory usage
First Claim
1. A system comprising:
- a memory control module configured to;
select, based on a size of first data, a first sub-block from a set of sub-blocks having sub-blocks of at least two different sizes, wherein the first sub-block is resident in a first page of physical memory, and wherein the first sub-block has a size smaller than a predetermined page size;
map a first virtual address associated with the first data to the first page of physical memory; and
allocate the first sub-block for storing the first data.
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Accused Products
Abstract
A processor (e.g. utilizing an operating system and/or circuitry) may access physical memory by paging, where a page is the smallest partition of memory mapped by the processor from a virtual address to a physical address. An application program executing on the processor addresses a virtual address space so that the application program may be unaware of physical memory paging mechanisms. A memory control layer manages physical memory space in units of sub-blocks, wherein a sub-blocks is smaller than a size of the page. Multiple virtual address blocks may be mapped to the same physical page in memory. A sub-block can be moved from a page (e.g. from one physical memory to a second physical memory) without moving other sub-blocks within the page in a manner that is transparent to the application program.
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Citations
26 Claims
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1. A system comprising:
a memory control module configured to; select, based on a size of first data, a first sub-block from a set of sub-blocks having sub-blocks of at least two different sizes, wherein the first sub-block is resident in a first page of physical memory, and wherein the first sub-block has a size smaller than a predetermined page size; map a first virtual address associated with the first data to the first page of physical memory; and allocate the first sub-block for storing the first data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 21, 22)
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8. A method comprising:
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selecting, based on a size of first data, a first sub-block from a set of sub-blocks having sub-blocks of at least two different sizes, wherein the first sub-block is resident in a first page of physical memory, and wherein the first sub-block is smaller than a predetermined page size; mapping a first virtual address associated with the first data to the first page of physical memory; and allocating the first sub-block for storing the first data. - View Dependent Claims (9, 10, 11, 12, 13, 23, 24)
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14. A system comprising:
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a processor configured to; specify a first virtual address; and map the first virtual address to a first sub-block in a first page of memory, the first sub-block having a size smaller than a predetermined page size, wherein a size of the first sub-block is based upon a size of a received data packet. - View Dependent Claims (15, 16, 17, 18)
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19. A network switch comprising:
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a switching fabric; and plural blades coupled to the switching fabric, at least one of the blades comprising; a memory control module configured to; select, based on a size of first data, a first sub-block from a set of sub-blocks having sub-blocks of at least two different sizes, wherein the first sub-block is resident in a first page of physical memory, and wherein the first sub-block has a size smaller than the first page; map a first virtual address associated with the first data to the first page of physical memory; and allocate the first sub-block for storing the first data. - View Dependent Claims (20, 25, 26)
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Specification