Angled implantation for removal of thin film layers

• US 7,595,248 B2
• Filed: 12/01/2005
• Issued: 09/29/2009
• Est. Priority Date: 12/01/2005
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Kavalieros, Jack, Brask, Justin K., Metz, Matthew V., Hattendorf, Michael L., Sandford, Justin S.
• Primary Examiner(s): Dickey; Thomas L
• Assistant Examiner(s): Erdem; Fazli
• Application Number:
  US11/293,753
• Publication Number:
  US 20070126067A1
• Time in Patent Office: 1,398 Days
• Field of Search: 438/184, 438/585, 438/586, 438/197, 438/230, 438/302, 257/E21.205, 257/E21.345, 257/E21.312, 257/E21.335, 257/E21.194, 257/E21.248, 257/E21.251, 257/E21.311, 257/E21.144, 257/E21.444, 257/E29.135, 257/E29.16, 257/E29.159
• US Class Current: 438/302
• CPC Class Codes: H01L 21/26586 characterised by the angle between the ion beam and the crystal planes or the main crystal surface
• CPC Class Codes: H01L 21/28114 characterised by the sectional shape, e.g. T, inverted-T
• CPC Class Codes: H01L 21/31111 by chemical means
• CPC Class Codes: H01L 21/31155 by ion implantation
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 29/42376 characterised by the length or the sectional shape
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/4958 with a multiple layer structure
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Abstract

Embodiments of the invention provide a device with a reverse-tapered gate electrode and a gate dielectric layer with a length close to that of the gate length. In an embodiment, this may be done by altering portions of a blanket dielectric layer with one or more angled ion implants, then removing the altered portions of the blanket dielectric layer.

Claims

1. A method, comprising:

forming a blanket dielectric layer on a substrate;

forming a reverse-tapered gate electrode on the blanket dielectric layer, an exposed portion of the blanket dielectric layer being adjacent side walls of the gate electrode;

implanting ions into the exposed portion of the blanket dielectric layer, the ions being implanted at an angle between about that of a first sidewall angle of a first reverse-tapered gate electrode sidewall and about two degrees less than the first sidewall angle; and

etching the exposed implanted portion to remove substantially all the exposed implanted portion and leave behind a gate dielectric layer.

2. The method of claim 1, wherein forming the reverse-tapered gate electrode comprises:

forming a blanket gate electrode layer on a substrate; and

removing portions of the blanket gate electrode layer to leave behind a gate electrode with a gate length adjacent the blanket dielectric layer, the gate electrode having reverse-tapered sidewalls so the gate electrode has an intermediate length further from the gate dielectric layer than the gate length, the intermediate length being greater than the gate length.

3. The method of claim 2, further comprising:

forming, after forming the gate electrode and the gate dielectric layer, spacers adjacent the gate electrode sidewalls;

removing the gate electrode to leave behind a trench between the spacers; and

forming a replacement gate electrode in the trench.

4. The method of claim 3, wherein forming a replacement gate electrode in the trench comprises forming a first metal gate electrode layer, the first metal gate electrode layer being conformal to a bottom of the trench and side walls of the trench.

5. The method of claim 4, wherein the first metal gate electrode layer does not completely fill the trench and wherein forming a replacement gate electrode in the trench further comprises forming a second gate electrode layer on the first metal gate electrode layer in the trench.

6. The method of claim 2, wherein at least a portion of each of the reverse-tapered gate electrode sidewalls has a sidewall angle between the reverse-tapered gate electrode sidewalls and a top surface of the substrate, the sidewall angle being between about eighty-five degrees and about seventy-five degrees.

7. The method of claim 6, wherein the ions are implanted at an angle between about that of the sidewall angle and about two degrees less than the sidewall angle.

8. The method of claim 1, wherein at least a portion of the reverse-tapered gate electrode sidewalls has a sidewall angle between the gate electrode sidewalls and the substrate and wherein implanting ions further comprises:

performing a second ion implantation process after the first ion implantation process, during which ions are implanted at an angle between about that of a second sidewall angle of a second reverse-tapered gate electrode sidewall opposite the first reverse-tapered gate electrode sidewall and about two degrees less than the second sidewall angle.