Semiconductor memory element, semiconductor memory device and method of fabricating the same

• US 7,598,565 B2
• Filed: 08/08/2006
• Issued: 10/06/2009
• Est. Priority Date: 12/18/2002
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kato, Kiyoshi
• Primary Examiner(s): PRENTY, MARK V
• Application Number:
  US11/500,445
• Publication Number:
  US 20060267077A1
• Time in Patent Office: 1,155 Days
• Field of Search: 257/316, 257/324, 257/66, 257/E21.689
• US Class Current: 257/316
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/49 comprising different types of peripheral transistor

Abstract

It is an object to provide a semiconductor memory device having a highly reliable and small-sized involatile memory by realizing a semiconductor memory element which restrains extreme concentration of an electric field onto a surface of activating layer in a channel region and is very minute. Further, it is an object thereof to provide a highly reliable and small-sized semiconductor memory device. There is fabricated a semiconductor memory element in which a surface of an activating layer is flat and which is very minute by using a crystallizing process of a semiconductor activating layer for adding a metal element onto a substrate having an insulating surface to subject to a heating processing and thereafter carrying out continuous oscillating laser irradiation. By using such a semiconductor memory element, a highly reliable and small-sized involatile memory and a semiconductor memory device having the involatile memory are provided.

Claims

1. A nonvolatile memory comprising a semiconductor memory element, said semiconductor memory element comprising:

a semiconductor active layer comprising a channel region and one conductive type impurity region;

a first insulating film;

a charge accumulating layer;

a second insulating film; and

a control gate electrode,

wherein the nonvolatile memory is formed over a substrate having an insulating surface;

wherein the channel region is a polycrystal semiconductor film crystallized by being irradiated with continuously oscillating laser;

wherein the semiconductor active layer is constituted by aggregating a plurality of crystal grains elongated in the same direction, and

wherein a surface roughness of the channel region is 0.1 nm through 60 nm in a P-V value.

4. The nonvolatile memory according to claim 1, wherein the semiconductor active layer comprises silicon.

7. The nonvolatile memory according to claim 1, wherein a structure of said semiconductor memory element is one selected from the group consisting of a structure having a floating gate electrode, an MNOS structure, and an MONOS structure.

10. The nonvolatile memory according to claim 1, wherein said semiconductor memory element is arranged in a NOR type memory cell array.

13. The nonvolatile memory according to claim 1, wherein said semiconductor memory element is arranged in a NAND type memory cell array.

16. A semiconductor memory device comprising the nonvolatile memory according to claim 1, wherein the semiconductor memory device is one selected from a group consisting of a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.

37. The nonvolatile memory according to claim 1, wherein a surface roughness of the channel region is 0.1 nm through 5 nm in an rms value.

2. A nonvolatile memory comprising a semiconductor memory element, said semiconductor memory element comprising:

a semiconductor active layer comprising a channel region and one conductive type impurity region;

a first insulating film;

a charge accumulating layer;

a second insulating film; and

a control gate electrode,

wherein the nonvolatile memory is formed over a substrate having an insulating surface; and

wherein a surface roughness of the channel region is 0.1 nm through 60 nm in a P-V value.

5. The nonvolatile memory according to claim 2, wherein the semiconductor active layer comprises silicon.

8. The nonvolatile memory according to claim 2, wherein a structure of said semiconductor memory element is one selected from the group consisting of a structure having a floating gate electrode, an MNOS structure, and an MONOS structure.

11. The nonvolatile memory according to claim 2, wherein said semiconductor memory element is arranged in a NOR type memory cell array.

14. The nonvolatile memory according to claim 2, wherein said semiconductor memory element is arranged in a NAND type memory cell array.

17. A semiconductor memory device comprising the nonvolatile memory according to claim 2, wherein the semiconductor memory device is one selected from a group consisting of a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.

3. A nonvolatile memory comprising a semiconductor memory element, said semiconductor memory element comprising:

a semiconductor active layer comprising a channel region and one conductive type impurity region;

a first insulating film;

a charge accumulating layer;

a second insulating film; and

a control gate electrode,

wherein the nonvolatile memory is formed over a substrate having an insulating surface; and

wherein a surface roughness of the channel region is 0.1 nm through 5 nm in an rms value.

6. The nonvolatile memory according to claim 3, wherein the semiconductor active layer comprises silicon.

9. The nonvolatile memory according to claim 3, wherein a structure of said semiconductor memory element is one selected from the group consisting of a structure having a floating gate electrode, an MNOS structure, and an MONOS structure.

12. The nonvolatile memory according to claim 3, wherein said semiconductor memory element is arranged in a NOR type memory cell array.

15. The nonvolatile memory according to claim 3, wherein said semiconductor memory element is arranged in a NAND type memory cell array.

18. A semiconductor memory device comprising the nonvolatile memory according to claim 3, wherein the semiconductor memory device is one selected from a group consisting of a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.

19. A nonvolatile memory comprising a semiconductor memory element, said semiconductor memory element comprising:

a charge accumulating layer surrounded by an insulating film between a semiconductor active layer and a control gate electrode, said semiconductor active layer comprising a channel region and one conductive type impurity region,

wherein the nonvolatile memory is formed over a substrate having an insulating surface;

wherein the channel region is a polycrystal semiconductor film crystallized by being irradiated with continuously oscillating laser,

wherein the semiconductor active layer is constituted by aggregating a plurality of crystal grains elongated in the same direction, and

wherein a surface roughness of the channel region is 0.1 nm through 60 nm in a P-V value.

22. The nonvolatile memory according to claim 19, wherein the semiconductor active layer comprises silicon.

25. The nonvolatile memory according to claim 19, wherein a structure of said semiconductor memory element is one selected from the group consisting of a structure having a floating gate electrode, an MNOS structure, and an MONOS structure.

28. The nonvolatile memory according to claim 19, wherein said semiconductor memory element is arranged in a NOR type memory cell array.

31. The nonvolatile memory according to claim 19, wherein said semiconductor memory element is arranged in a NAND type memory cell array.

34. A semiconductor memory device comprising the nonvolatile memory according to claim 19, wherein the semiconductor memory device is one selected from a group consisting of a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.

38. The nonvolatile memory according to claim 19, wherein a surface roughness of the channel region is 0.1 nm through 5 nm in an rms value.

20. A nonvolatile memory comprising a semiconductor memory element, said semiconductor memory element comprising:

a charge accumulating layer surrounded by an insulating film between a semiconductor active layer and a control gate electrode, said semiconductor active layer comprising a channel region and one conductive type impurity region,

wherein the nonvolatile memory is formed over a substrate having an insulating surface; and

wherein a surface roughness of the channel region is 0.1 nm through 60 nm in a P-V value.

23. The nonvolatile memory according to claim 20, wherein the semiconductor active layer comprises silicon.

26. The nonvolatile memory according to claim 20, wherein a structure of said semiconductor memory element is one selected from the group consisting of a structure having a floating gate electrode, an MNOS structure, and an MONOS structure.

29. The nonvolatile memory according to claim 20, wherein said semiconductor memory element is arranged in a NOR type memory cell array.

32. The nonvolatile memory according to claim 20, wherein said semiconductor memory element is arranged in a NAND type memory cell array.

35. A semiconductor memory device comprising the nonvolatile memory according to claim 20, wherein the semiconductor memory device is one selected from a group consisting of a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.

21. A nonvolatile memory comprising a semiconductor memory element, said semiconductor memory element comprising:

a charge accumulating layer surrounded by an insulating film between a semiconductor active layer and a control gate electrode, said semiconductor active layer comprising a channel region and one conductive type impurity region,

wherein the nonvolatile memory is formed over a substrate having an insulating surface; and

wherein a surface roughness of the channel region is 0.1 nm through 5 nm in an rms value.

24. The nonvolatile memory according to claim 21, wherein the semiconductor active layer comprises silicon.

27. The nonvolatile memory according to claim 21, wherein a structure of said semiconductor memory element is one selected from the group consisting of a structure having a floating gate electrode, an MNOS structure, and an MONOS structure.

30. The nonvolatile memory according to claim 21, wherein said semiconductor memory element is arranged in a NOR type memory cell array.

33. The nonvolatile memory according to claim 21, wherein said semiconductor memory element is arranged in a NAND type memory cell array.

36. A semiconductor memory device comprising the nonvolatile memory according to claim 21, wherein the semiconductor memory device is one selected from a group consisting of a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.