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Process, supply, and temperature insensitive integrated time reference circuit

  • US 7,598,822 B2
  • Filed: 04/07/2005
  • Issued: 10/06/2009
  • Est. Priority Date: 04/07/2005
  • Status: Active Grant
First Claim
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1. A time reference circuit insensitive to internal variations in resistance, capacitance, and temperature, comprising:

  • an MOS charging capacitor;

    a regulated charging current source switchably coupled to the capacitor, the charging current source having an inherent (1/R) resistance variation and having a current proportional to absolute temperature;

    a reference voltage circuit for generating a reference voltage that varies as 1/R wherein the resistance variation of the charging current source is compensated for, the reference voltage circuit also having an inherent MOS gate capacitance variation wherein the MOS transistor in the reference voltage circuit substantially compensates for the variation of the MOS charging capacitor; and

    wherein the reference voltage circuit has an inherent temperature variation, and wherein the charging current source inherently varies in relationship to the temperature variation of the reference voltage circuit, thereby compensating for the temperature variation.

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