Layered structure with printed elements

• US 7,599,192 B2
• Filed: 08/22/2005
• Issued: 10/06/2009
• Est. Priority Date: 04/11/2005
• Status: Expired due to Fees

• Current Assignee: Aveso, Inc. (Thales DIS France SA)
• Original Assignee: Aveso, Inc. (Thales DIS France SA)
• Inventors: Quindlen, Stephen F., McDougall, James P., Sime, David G., Pennaz, Thomas J.
• Primary Examiner(s): Dinh; Tuan T
• Assistant Examiner(s): Getachew; Abiy
• Application Number:
  US11/209,345
• Publication Number:
  US 20060227523A1
• Time in Patent Office: 1,506 Days
• Field of Search: 361/761, 361792-795, 174/250, 174259-210, 428209-210
• US Class Current: 361/761
• CPC Class Codes: H01M 10/425 Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing printed circuits H05K1/00
• CPC Class Codes: H01M 6/40 Printed batteries , e.g. thin film batteries
• CPC Class Codes: H05K 1/18 Printed circuits structurally associated with non-printed electric components H05K1/0201, H05K1/023, H05K1/0243, and H05K1/16 take precedence
• CPC Class Codes: H05K 1/182 associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
• CPC Class Codes: H05K 1/189 characterised by the use of a flexible or folded printed circuit H05K3/326 takes precedence
• CPC Class Codes: H05K 2201/10037 Printed or non-printed battery
• CPC Class Codes: H05K 2201/10128 Display
• CPC Class Codes: H05K 2203/1311 Foil encapsulation, e.g. of mounted components
• CPC Class Codes: H05K 3/284 for encapsulating mounted components H05K1/185 takes precedence
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y10T 428/24917 including metal layer
• CPC Class Codes: Y10T 428/24926 including ceramic, glass, porcelain or quartz layer

Abstract

The present invention incorporates electronic components into an electronic core structure that may be readily hot laminated by existing processes. The structure may include multiple desired electronic components, such as a display, battery or other power source, integrated circuits, switches, magnetic stripe emulator, antenna, smart chips or other input devices. The structure includes laminated buffer layers to bridge layers and compensate for variation in electronic component dimensions. The structure may also incorporate battery packaging as part of the core layer structure and use printed electronic circuitry as part of the electronic core layers to impart the desired characteristics. A variety of components may be incorporated in the structure.

Claims

1. A thin, layered structure of laminated configuration comprising:

a first laminatable layer;

a display cell coupled to said first layer;

at least one pre-formed component connection layer coupled to said display cell;

a buffer layer of formable material disposed over said at least one pre-formed component connection layer, said display cell, and components thereof of varying thicknesses; and

a second laminatable layer disposed over said buffer layer, said buffer layer configured to compensate for the varying thicknesses to provide a substantially uniform overall thickness to the layered structure.

2. The layered structure of claim 1 further comprising:

an integrated circuit component coupled to said display cell; and

at least one display component of said display cell formed by printing a plurality of pixels that are operably electronically connected to the integrated circuit component.

3. The layered structure of claim 2 wherein the plurality of pixels are matingly connected to display-receiving connection points.

4. The layered structure of claim 1 wherein the first laminatable layer is suitable for lamination to an adjacent lower cover surface.

5. The layered structure of claim 1 wherein the second laminatable layer is suitable for lamination to an adjacent upper cover surface.

6. The layered structure of claim 2 further comprising a chip contact plate having electrical traces coupling the integrated circuit component thereto, from a laterally adjacent position.

7. The layered structure of claim 6 wherein the chip contact plate is a contact plate for a smart card and the integrated circuit component is configured to perform smart card functions.

8. The layered structure of claim 1 wherein the component connection layer is pre-formed with apertures to receive components and to assist in compensating for thickness differences among components between the first laminatable layer and the second laminatable layer.

9. The layered structure of claim 1 wherein the component connection layer is pre-formed with apertures to receive components and to assist in compensating for thickness differences among components between the first laminatable layer and the second laminatable layer, and the buffer layer is formable to fill cavities associated with the apertures.

10. The layered structure of claim 1 wherein the component connection layer has electrical traces printed on upper and lower surfaces thereof.

11. A thin, layered core structure for providing in a laminated unit electronic components for information processing, the layered structure comprising:

a base layer and a top layer of laminatible material;

at least one pre-formed component connection layer disposed between the base layer and top layer;

at least one electronic component coupled to said at least one pre-formed component connection layer; and

a buffer layer configured between the base layer and top layer, the buffer layer being made of a formable material that compensates for thickness differences among said at least one electronic component and components of said at least one pre-formed component connection layer between the base layer and top layer.

12. The layered structure of claim 11 wherein the at least one electronic component is an integrated circuit component.

13. The layered structure of claim 11 wherein the at least one electronic component is a magnetic stripe emulator.

14. The layered structure of claim 11 wherein the at least one electronic component is a biometric sensor.

15. The layered structure of claim 12 further comprising a chip contact plate having electrical traces coupling the integrated circuit component thereto, from a laterally adjacent position.

16. The layered structure of claim 15 wherein the chip contact plate is a contact plate for a smart card and the integrated circuit component is configured to perform smart card functions.