Field plate trench transistor

• US 7,605,427 B2
• Filed: 06/17/2005
• Issued: 10/20/2009
• Est. Priority Date: 06/18/2004
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Hirler, Franz
• Primary Examiner(s): Parker; Kenneth A
• Assistant Examiner(s): Lin; John
• Application Number:
  US11/156,232
• Publication Number:
  US 20060017056A1
• Time in Patent Office: 1,586 Days
• Field of Search: 257/331, 257/E29.04, 438/270
• US Class Current: 257/331
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A field plate trench transistor has a semiconductor body which contains a plurality of trenches which are isolated from one another by mesa regions. The trenches contain gate electrodes for controlling a vertical flow of current through the semiconductor body. At least one portion of the gate electrodes are at source potential.

Claims

1. A field plate trench transistor comprising:

a semiconductor body containing a plurality of trenches which are isolated from one another by mesa regions, the trenches containing gate electrodes operable to control a vertical flow of current through the semiconductor body,

wherein a first plurality of the gate electrodes is configured such that when a gate potential and a source potential are applied to the field plate trench transistor, the first plurality of the gate electrodes is at the source potential which differs from the gate potential, and the remaining gate electrodes which form a second plurality of the gate electrodes are configured such that when the gate potential and the source potential are applied to the field plate trench transistor, the second plurality of the gate electrodes are at the gate potential, and

below the second plurality of the gate electrodes within the trenches there are field electrodes which are configured such that when the gate potential and the source potential are applied to the field plate trench transistor, the field electrodes are at the source potential.

2. The field plate trench transistor of claim 1 wherein a drain zone is formed within the semiconductor body.

3. The field plate trench transistor of claim 2 wherein the trenches include lower ends situated within a region, which extends in a vertical direction starting from an upper region of the drain zone upward until a vertical position is reached which is spaced approximately the width of one of the mesa regions apart from the drain zone.

4. The field plate trench transistor of claim 3 wherein a first drift zone is arranged above the drain zone and a second drift zone is arranged on the first drift zone, the first drift zone having a lower doping level than the second drift zone, and the lower ends of the trenches being situated within a region which extends upward from an upper region of the first drift zone until a vertical position is reached which is spaced approximately the width of a mesa region apart from the first drift zone.

5. The field plate trench transistor of claim 1 wherein the gate electrodes of every second trench are configured such that they are at the source potential, and the remaining gate electrodes are configured such that they are at the gate potential.

6. The field plate trench transistor of claim 1 wherein the gate electrodes of every third trench are a configured such that they are at the source potential, and the remaining gate electrodes are configured such that they are at the gate potential.

7. The field plate trench transistor of claim 1 wherein the potential of the gate electrodes and field electrodes varies in a lateral direction along the trenches.

8. The field plate trench transistor of claim 1 further comprising body regions and source regions contained in the semiconductor body, wherein a contact makes simultaneous contact with one of the body regions and one of the source regions in two adjacent mesa regions and with the gate electrode of the trench situated between the two adjacent mesa regions.

9. The field plate trench transistor of claim 8 wherein the semiconductor body further comprises drift regions positioned below the body regions in the semiconductor body, wherein insulating layers line the sidewalls of the trenches and enclose the gate electrodes and field electrodes, and wherein thicknesses of the insulating layers which line the side walls of the trenches are thinner in the body regions than in the drift regions.

10. A field plate trench transistor comprising

a) a semiconductor body;

b) a plurality of trenches contained in the semiconductor body, the plurality of trenches being isolated from one another by mesa regions, wherein the plurality of trenches contain

i) first and second gate electrodes operable to control a vertical flow of current through the semiconductor body and

ii) field electrodes which underlie the gate electrodes and are configured such that when a gate potential and a source potential are applied to the field plate trench transistor, the field electrodes are at the source potential; and

wherein the first gate electrodes are insulated from the underlying field electrodes and are configured such that when the gate potential and the source potential are applied to the field plate trench transistor, the first gate electrodes are at the gate potential. and the second gate electrodes are configured such that when the gate potential and the source potential are applied to the field plate trench transistor, the second gate electrodes are at the source potential,

wherein the first and second gate electrodes are electrically insulated from a source contact by means of an insulating layer, and

wherein the first and second gate electrodes traverse source regions.

11. The field plate trench transistor of claim 10 further comprising a drain zone formed within the semiconductor body.

12. The field plate trench transistor of claim 11 wherein the plurality of trenches include lower ends situated within a region extending in a vertical direction from an upper region of the drain zone upward to a vertical position approximately the width of one of the mesa regions apart from the drain zone.

13. The field plate trench transistor of claim 12 wherein a first drift zone is arranged above the drain zone and a second drift zone is arranged on the first drift zone, the first drift zone having a lower doping level than the second drift zone, and the lower ends of the plurality of trenches being situated within a region extending in a vertical direction from an upper region of the first drift zone upward to a vertical position which is spaced approximately the width of a mesa region apart from the first drift zone.

14. The field plate trench transistor of claim 10 further comprising body regions and source regions contained in the semiconductor body, and further comprising a contact which makes simultaneous contact with one of the body regions and one of the source regions in two adjacent mesa regions.

15. The field plate trench transistor of claim 14 further comprising drift regions contained in the semiconductor body and underlying the body regions, and wherein insulating layers line the sidewalls of the trenches and enclose the first and second gate electrodes and field electrodes, and wherein the thicknesses of the insulating layers which line the side walls of the trenches are thinner in the region of the body regions than in the region of the drift regions.