RF power transistor having an encapsulated chip package
First Claim
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1. A discrete radio frequency (RF) power transistor, comprising:
- a semiconductor chip;
a gate terminal coupled to the semiconductor chip, a source terminal coupled to the semiconductor chip, a first drain terminal coupled to the semiconductor chip, and a second drain terminal coupled to the semiconductor chip;
a plastic packaging material encapsulating the semiconductor chip, a portion of the gate terminal, a portion of the source terminal, a portion of the first drain terminal, and a portion of the second drain terminal; and
a wire bond to couple the gate terminal to the semiconductor chip, the wire bond having a substantially perpendicular bond angle with respect to a surface of the semiconductor chip to reduce arcing between the semiconductor chip and the wire bond, or to reduce gate-to-drain capacitance, or combinations thereofwherein the gate terminal is bent to provide a closer and planar contact to the gate interconnect to couple to the wire bond and wherein at least one or more of the first drain terminal or the second drain terminal, or combinations thereof, are substantially unbent and coplanar with an unbent portion of the gate terminal to allow for surface mounting of the discrete RF power transistor on a planar surface, wherein at least two or more terminals are substantially coplanar.
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Accused Products
Abstract
In various embodiments, semiconductor components and methods to manufacture semiconductor components are disclosed. In one embodiment, a method to manufacture semiconductor components includes attaching multiple heat spreaders to a semiconductor wafer. Other embodiments are described and claimed.
39 Citations
6 Claims
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1. A discrete radio frequency (RF) power transistor, comprising:
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a semiconductor chip; a gate terminal coupled to the semiconductor chip, a source terminal coupled to the semiconductor chip, a first drain terminal coupled to the semiconductor chip, and a second drain terminal coupled to the semiconductor chip; a plastic packaging material encapsulating the semiconductor chip, a portion of the gate terminal, a portion of the source terminal, a portion of the first drain terminal, and a portion of the second drain terminal; and a wire bond to couple the gate terminal to the semiconductor chip, the wire bond having a substantially perpendicular bond angle with respect to a surface of the semiconductor chip to reduce arcing between the semiconductor chip and the wire bond, or to reduce gate-to-drain capacitance, or combinations thereof wherein the gate terminal is bent to provide a closer and planar contact to the gate interconnect to couple to the wire bond and wherein at least one or more of the first drain terminal or the second drain terminal, or combinations thereof, are substantially unbent and coplanar with an unbent portion of the gate terminal to allow for surface mounting of the discrete RF power transistor on a planar surface, wherein at least two or more terminals are substantially coplanar. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification