Implementation of memory access control using optimization
First Claim
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1. A computer-readable storage medium encoded with computer-executable instructions that when executed by a processor cause said processor to perform a method, the method comprising:
- storing information regarding a directed labeled graph that comprises a plurality of vertices and a plurality of labeled edges connecting the vertices, each edge being defined by an ordered pair of the vertices and a label, wherein said graph is representative of an address translation map that comprises a plurality of pages, each page in said address translation map corresponding to a vertex of said graph, each reference within one page of said address translation map to another page of said address translation map corresponding to an edge of said graph, and a binary attribute associated with a reference corresponding to a label of the reference'"'"'s corresponding edge, each label indicating whether the reference has the associated binary attribute;
performing a first operation that changes said graph by removing or adding a vertex, removing or adding an edge, or changing the label of an edge;
updating said information to reflect the change to said graph, wherein the change is based on a memory access policy; and
determining whether a second operation may be performed based at least in part on said information regarding said directed label graph.
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Abstract
Mechanisms are disclosed that may allow certain memory access control algorithms to be implemented efficiently. When memory access control is based on controlling changes to an address translation map (or set of maps), it may be necessary to determine whether a particular map change would allow memory to be accessed in an impermissible way. Certain data about the map may be cached in order to allow the determination to be made more efficiently than performing an evaluation of the entire map.
42 Citations
19 Claims
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1. A computer-readable storage medium encoded with computer-executable instructions that when executed by a processor cause said processor to perform a method, the method comprising:
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storing information regarding a directed labeled graph that comprises a plurality of vertices and a plurality of labeled edges connecting the vertices, each edge being defined by an ordered pair of the vertices and a label, wherein said graph is representative of an address translation map that comprises a plurality of pages, each page in said address translation map corresponding to a vertex of said graph, each reference within one page of said address translation map to another page of said address translation map corresponding to an edge of said graph, and a binary attribute associated with a reference corresponding to a label of the reference'"'"'s corresponding edge, each label indicating whether the reference has the associated binary attribute; performing a first operation that changes said graph by removing or adding a vertex, removing or adding an edge, or changing the label of an edge; updating said information to reflect the change to said graph, wherein the change is based on a memory access policy; and determining whether a second operation may be performed based at least in part on said information regarding said directed label graph. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method comprising:
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a computer storing information regarding a directed labeled graph that comprises a plurality of vertices and a plurality of labeled edges connecting the vertices, each edge being defined by an ordered pair of the vertices and a label, wherein said graph is representative of an address translation map that comprises a plurality of pages, each page in said address translation map corresponding to a vertex of said graph, each reference within one page of said address translation map to another page of said address translation map corresponding to an edge of said graph, and a binary attribute associated with a reference corresponding to a label of the reference'"'"'s corresponding edge, each label indicating whether the reference has the associated binary attribute; the computer performing a first operation that changes said graph by removing or adding a vertex, removing or adding an edge, or changing the label of an edge; the computer updating said information to reflect the change to said graph, wherein the change is based on a memory access policy; and the computer determining whether a second operation may be performed based at least in part on said information regarding said directed label graph. - View Dependent Claims (12, 13, 14, 15)
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16. A computer system comprising:
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means for storing information regarding a directed labeled graph that comprises a plurality of vertices and a plurality of labeled edges connecting the vertices, each edge being defined by an ordered pair of the vertices and a label, wherein said graph is representative of an address translation map that comprises a plurality of pages, each page in said address translation map corresponding to a vertex of said graph, each reference within one page of said address translation map to another page of said address translation map corresponding to an edge of said graph, and a binary attribute associated with a reference corresponding to a label of the reference'"'"'s corresponding edge, each label indicating whether the reference has the associated binary attribute; means for performing a first operation that changes said graph by removing or adding a vertex, removing or adding an edge, or changing the label of an edge; means for updating said information to reflect the change to said graph, wherein the change is based on a memory access policy; and means for determining whether a second operation may be performed based at least in part on said information regarding said directed label graph. - View Dependent Claims (17, 18, 19)
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Specification