Signal pulse detection scheme for use in real-time spectrum analysis

• US 7,606,335 B2
• Filed: 07/30/2007
• Issued: 10/20/2009
• Est. Priority Date: 04/22/2002
• Status: Expired due to Fees

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Inventors: Kane, Brian F., Kloper, David S., Sugar, Gary L.
• Primary Examiner(s): PHU, PHUONG M
• Application Number:
  US11/830,390
• Publication Number:
  US 20080019464A1
• Time in Patent Office: 813 Days
• Field of Search: 375/340, 375/259, 375/224, 375/228, 375/316, 455/226.1, 455/226.2, 702 75- 77, 324/76.19, 324 7621- 7625, 370/241
• US Class Current: 375/340
• CPC Class Codes: G01R 23/16 Spectrum analysis; Fourier analysis
• CPC Class Codes: H04L 1/1664 the supervisory signal being transmitted together with payload signals; piggybacking
• CPC Class Codes: H04L 1/1867 Arrangements specially adapted for the transmitter end
• CPC Class Codes: H04W 16/14 Spectrum sharing arrangements between different networks
• CPC Class Codes: H04W 24/00 Supervisory, monitoring or testing arrangements

Abstract

A spectrum analysis engine (SAGE) that comprises a spectrum analyzer component, a signal detector component, a universal signal synchronizer component and a snapshot buffer component. The spectrum analyzer component generates data representing a real-time spectrogram of a bandwidth of radio frequency (RF) spectrum. The signal detector detects signal pulses in the frequency band and outputs pulse event information entries output, which include the start time, duration, power, center frequency and bandwidth of each detected pulse. The signal detector also provides pulse trigger outputs which may be used to enable/disable the collection of information by the spectrum analyzer and the snapshot buffer components. An alternative pulse detection module is provided that tracks signal pulses by comparing peak data from successive FFT cycles with existing signal pulse data that is derived from comparing peak data for prior FFT cycles. Peaks for new FFT cycles are matched to data associated with signal pulses determined to be occurring over many FFT intervals.

Claims

1. A method comprising:

in a radio receiver device configured to receive radio frequency (RF) energy, storing peak data describing spectral characteristics comprising frequency location and bandwidth for each of one or more spectral peaks of RF energy detected by the radio receiver device over sampling cycles;

in the radio receiver device, comparing the peak data for one or more peaks detected for a current sampling cycle with the peak data for one or more peaks detected during a previous sampling cycle;

in the radio receiver device, based on said comparing, storing a list of signal pulse data describing one or more identified signal pulses, where a signal pulse of said one or more identified signal pulses comprises a sequence of spectral peaks having similar spectral characteristics over multiple time intervals; and

updating the list by extending a duration of an existing signal pulse in the list with data for a spectral peak that has spectral characteristics which match data an existing signal pulse in the list, adding data for a new signal pulse to the list, or modifying the list to indicate termination of an existing signal pulse in the list.

2. The method of claim 1, and further comprising in the radio receiver device, detecting peaks of RF energy as power values above a power threshold at a set of frequencies.

3. The method of claim 2, wherein detecting peaks comprises detecting peaks of RF energy as power values above the power threshold at a set of contiguous frequencies.

4. The method of claim 3, wherein detecting peaks comprises comparing power values at a plurality of frequencies with the power threshold, wherein the power threshold for the comparison at a particular frequency may vary with a power level at a frequency near the particular frequency.

5. The method of claim 1, wherein storing peak data comprises storing data describing one or more of a lefthand frequency, a center frequency and a righthand frequency, of each of the one or more peaks.

6. The method of claim 1, wherein comparing comprises comparing frequency location, bandwidth and power of peak data for one or more peaks associated with the current sampling cycle with frequency location, bandwidth and power of signal pulses in the list.

7. The method of claim 1, and further comprising joining signal pulse data in the list for similar pulses that may have been broken up due to signal fading and other conditions.

8. The method of claim 1, and further comprising in the radio receiver device storing digital signals representing samples of received RF energy when a signal pulse is detected.

9. A signal pulse detector that detects signal pulses from received radio frequency (RF) energy, comprising:

a peak computation circuit that computes peak data describing frequency location and bandwidth for each of one or more peaks of RF energy detected over a plurality of sampling cycles;

a first memory that stores the peak data for one or more peaks detected for a current sampling cycle; and

a comparator circuit coupled to the first memory, and which compares the peak data with existing pulse data to determine whether to (1) extend an existing pulse;

(2) terminate an existing pulse;

or (3) add a new pulse to the existing pulse data.

10. The signal pulse detector of claim 9, and further comprising a second memory that stores the existing pulse data in an existing pulse list for signal pulses determined to occur based on peak data stored in the first memory, and that stores an updated pulse list containing changes to the existing pulse list based on comparison of data in the first memory for the current sampling cycle with the existing pulse data in the existing pulse list.

11. The signal pulse detector of claim 9, wherein the peak computation circuit and the comparator circuit are implemented by digital logic gates.

12. The signal pulse detector of claim 9, wherein the peak computation circuit, the comparator circuit and the first memory are implemented in an integrated circuit.

13. The signal pulse detector of claim 9, and further comprising a memory that stores one or more of:

a. a running sum of the power at each frequency bin over time intervals;

b. a duty count comprising a running sum at each time interval of the number of times the power at each frequency bin exceeds the power threshold;

c. a maximum power for each frequency bin for the current and prior time intervals; and

d. a running count of the number of time intervals in which a certain number of peaks have been detected.

14. A system comprising the signal pulse detector of claim 9, and further comprising a memory controller coupled to the comparator circuit, wherein the signal pulse detector outputs a trigger signal in response to detecting a signal pulse thereby causing the memory controller to store digital samples of received RF energy for a time interval in a memory.

15. The system of claim 14, wherein the memory controller writes a timestamp identifying a time associated with an occurrence of the trigger signal.

16. The signal pulse detector of claim 9, and further comprising a memory interface circuit that outputs the existing pulse data to a memory.

17. A system comprising the signal pulse detector of claim 16, and further comprising a processor coupled to the memory that processes the existing pulse data stored in the memory.

18. The system of claim 17, wherein the processor joins pulse data for similar pulses that may have been broken up due to signal fading and other conditions.