On die thermal sensor

• US 7,606,674 B2
• Filed: 06/29/2007
• Issued: 10/20/2009
• Est. Priority Date: 10/31/2006
• Status: Expired due to Fees

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.), SK Hynix Inc.
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: Jung, Jong-Ho
• Primary Examiner(s): Dunn; Drew A
• Assistant Examiner(s): VO, HIEN XUAN
• Application Number:
  US11/819,792
• Publication Number:
  US 20080101436A1
• Time in Patent Office: 844 Days
• Field of Search: 702/64, 702/99, 702/130, 702/136, 327/512, 327/513, 327/170, 327/539, 374/170
• US Class Current: 702/64
• CPC Class Codes: G01K 7/01 using semiconducting elements having PN junctions G01K7/02, G01K7/16, G01K7/30 take precedence
• CPC Class Codes: G01K 7/425 Thermal management of integrated systems

Abstract

An on die thermal sensor includes a bandgap unit for generating a first voltage containing temperature information, a tracking unit for tracking a voltage level of the first voltage, and a low power control unit for generating a tracking enable signal for enabling the tracking unit and disabling the tracking unit after a minimum tracking operation time of the tracking unit elapses.

Claims

1. An on die thermal sensor (ODTS), comprising:

a bandgap unit configured to generate a first voltage including temperature information in response to a bandgap enable signal;

a tracking unit configured to track a voltage level of the first voltage generated from the bandgap unit in response to enabling of a tracking enable signal; and

a low power control unit configured to generate a pre-tracking enable signal and to generate the tracking enable signal in response to the generated pre-tracking enable signal, the low power control unit is configured to outputs the bandgap enable signal to the bandgap unit,

wherein the tracking enable signal is configured to be disabled after a minimum tracking operation time of the tracking unit elapses.

2. The ODTS as recited in claim 1, wherein the low power control unit includes:

a signal generator for outputting the tracking enable signal that is activated in response to a pre-tracking enable signal and is deactivated after the minimum tracking operation time of the tracking unit elapses; and

a controller for outputting the pre-tracking enable signal for controlling the signal generator.

3. The ODTS as recited in claim 2, wherein the signal generator deactivates the tracking enable signal when an increment signal and a decrement signal are input a predetermined number of times during the tracking operation of the tracking unit.

4. The ODTS as recited in claim 3, wherein the predetermined number of times increases when the tracking operation of the tracking unit is slow, and decreases when the tracking operation of the tracking unit is fast.

5. The ODTS as recited in claim 3, wherein the signal generator includes:

a pulse generating unit for receiving the pre-tracking enable signal to output a first enable pulse;

a latch unit for sequentially latching the tracking enable signal at least one time according to the increment signal and the decrement signal, and outputting a stop signal; and

an output unit for outputting the tracking enable signal that is activated in response to the first enable pulse and is deactivated in response to the stop signal.

6. The ODTS as recited in claim 5, wherein the pulse generating unit includes:

an inverter chain for inverting and delaying the pre-tracking enable signal by a predetermined time;

a NAND gate for performing a NAND operation to the pre-tracking enable signal and an output signal of the inverter chain; and

an inverter for inverting an output of the NAND gate to output the first enable pulse.

7. The ODTS as recited in claim 5, wherein the latch unit comprises:

a plurality of serially connected latches for latching the tracking enable signal; and

a plurality of pass gates disposed among the latches and sequentially turned on in response to the increment signal and the decrement signal.

8. The ODTS as recited in claim 5, wherein the output unit comprises first and second NAND gates forming a set-reset (SR) latch configured to receive the first enable pulse and the stop signal.

9. The ODTS as recited in claim 1, wherein the low power control unit outputs a bandgap enable signal for enabling the bandgap unit.

10. An on die thermal sensor (ODTS), comprising:

a bandgap unit configured to detect a temperature of a semiconductor device to generate a first voltage including temperature information in response to a bandgap enable signal;

a tracking unit configured to generate a temperature control code by comparing the first voltage and a second voltage in response to enabling of a tracking enable signal;

a controller configured to output the bandgap enable signal to the bandgap unit and to output a pre-tracking enable signal; and

a signal generator configured to output a tracking enable signal in response to the pre-tracking enable signal outputted from the controller,

wherein the tracking enable signal is inactivated after the minimum tracking operation time of the tracking unit elapses.

11. The ODTS as recited in claim 10, wherein the tracking unit includes:

a voltage comparator for comparing the first voltage and the second voltage to output a decrement signal and an increment signal;

a counter for increasing or decreasing a preset digital code in response to the increment signal or the decrement signal, and outputting the temperature control code; and

a converter for outputting the second voltage in response to the temperature control code.

12. The ODTS as recited in claim 11, wherein the voltage comparator outputs the decrement signal when the first voltage is lower than the second voltage, and outputs the increment signal when the first voltage is higher than the second voltage.

13. The ODTS as recited in claim 12, wherein the signal generator deactivates the tracking enable signal when the increment signal and the decrement signal are input a predetermined number of times during the tracking operation of the tracking unit.

14. The ODTS as recited in claim 13, wherein the predetermined number of times increases when the tracking operation of the tracking unit is slow, and decreases when the tracking operation of the tracking unit is fast.

15. The ODTS as recited in claim 13, wherein the signal generator includes:

a pulse generating unit for receiving the pre-tracking enable signal to output a first enable pulse;

a latch unit for sequentially latching the tracking enable signal at least one time according to the increment signal and the decrement signal, and outputting a stop signal; and

an output unit for outputting the tracking enable signal that is activated in response to the first enable pulse and is deactivated in response to the stop signal.

16. The ODTS as recited in claim 15, wherein the pulse generating unit includes:

an inverter chain for inverting and delaying the pre-tracking enable signal by a predetermined time;

a NAND gate for performing a NAND operation to the pre-tracking enable signal and an output signal of the inverter chain; and

an inverter for inverting an output of the NAND gate to output the first enable pulse.

17. The ODTS as recited in claim 15, wherein the latch unit comprises:

a plurality of serially connected latches for latching the tracking enable signal; and

a plurality of pass gates disposed among the latches and sequentially turned on in response to the increment signal and the decrement signal.

18. The ODTS as recited in claim 15, wherein the output unit comprises first and second NAND gates forming a set-reset (SR) latch configured to receive the first enable pulse and the stop signal.