Component arrangement provided with a carrier substrate

• US 7,608,789 B2
• Filed: 08/02/2004
• Issued: 10/27/2009
• Est. Priority Date: 08/12/2004
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Epcos AG (TDK Corporation)
• Inventors: Krüger, Hans, Stelzl, Alois
• Primary Examiner(s): Ngo; Hung V
• Application Number:
  US11/573,610
• Publication Number:
  US 20080038577A1
• Time in Patent Office: 1,912 Days
• Field of Search: 174/521, 174/528, 174/536, 174/551, 174/255, 174/260, 257/698, 257/778, 257/737
• US Class Current: 174/521
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/315 the encapsulation having a cavity
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/0102 Calcium [Ca]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: Y10T 428/12375 having member which crosses the plane of another member [e.g., T or X cross section, etc.]
• CPC Class Codes: Y10T 428/12486 Laterally noncoextensive components [e.g., embedded, etc.]
• CPC Class Codes: Y10T 428/23 : Sheet including cover or casing
• CPC Class Codes: Y10T 428/24 : Structurally defined web or sheet [e.g., overall dimension, etc.]

Abstract

A component arrangement includes a carrier substrate having at least one component arranged thereon. The carrier substrate contains at least one layer of glass film and an intermediate layer, which is mounted on at least one side of the glass film. The component is covered and sealed by a cover layer mounted on the carrier substrate.

Claims

1. A component arrangement comprising:

a carrier substrate;

a component on the carrier substrate; and

a cover layer on the carrier substrate, the cover layer being over the component and forming a seal with the carrier substrate to seal the component;

wherein the carrier substrate comprises;

at least two layers of glass film, the at least two layers of glass film comprising a first glass film and a second glass film, and

an intermediate layer over the first glass film;

wherein a recess in the carrier substrate extends along an exterior of the component, the recess extending through the first glass film from a side of the carrier substrate facing the component to a contact plane;

wherein the contact plane comprises the second glass film and a metallization on the second glass film; and

wherein the cover layer is electrically connected to the metallization that is part of the contact plane.

2. The component arrangement of claim 1, wherein the carrier substrate comprises a composite comprised of glass film and a low temperature co-fire ceramic.

3. The component arrangement of claim 1, wherein the carrier substrate comprises a multilayer substrate.

4. The component arrangement of claim 3, wherein the multilayer substrate comprises low temperature co-fire ceramic.

5. The component arrangement of claim 1, wherein the component comprises a module.

6. The component arrangement of claim 1, wherein the component is mounted over the at least two layers of glass film.

7. The component arrangement of claim 1, further comprising:

a chip comprising a component structure.

8. The component arrangement of claim 1, further comprising:

a chip comprising a surface acoustic wave component.

9. The component arrangement of claim 1, wherein the cover layer has metallic characteristics.

10. The component arrangement of claim 1, wherein the cover layer comprises a glob top made from thermosetting resin.

11. The component arrangement of claim 1, further comprising:

a contact element on a bottom of the carrier substrate;

wherein the contact element is electrically connected to the component.

12. The component arrangement of claim 11, wherein the carrier substrate comprises a feedthrough contact that extends from a first side of the carrier substrate nearest to the component towards the bottom of the carrier substrate.

13. The component arrangement according to claim 11, wherein the carrier substrate comprises feedthrough contacts that extend through at least two layers of glass film to the contact element, the feed through contacts being offset from each other.

14. The component arrangement of claim 1, wherein the carrier substrate comprises a first metallic contact surface, and the component comprises a second metallic contact surface;

and

wherein the component arrangement comprises an electrical connection between the first metallic contact surface and the second metallic contact surface, the electrical connection comprising bumps.

15. The component arrangement of claim 1, which has a hollow space between the component and the carrier substrate, the hollow space being formed by the cover layer sealing to the carrier substrate.

16. The component arrangement of claim 14, further comprising a mask layer in a region around the bumps, the mask layer substantially covering the first metallic contact surfaces.

17. The component of claim 1, wherein a thickness of the first glass film, which is adjacent to the component, is less than a thickness of a layer of glass film that is not adjacent to the component.

18. The component arrangement of claim 17, wherein a thickness of the layer of glass film that is not adjacent to the component is between 50 μ

m to 100 μ

m.

19. The component of claim 1, wherein a ground connection of the component is electrically connected to the cover layer.

20. The component arrangement of claim 1, wherein the carrier substrate is multilayered;

and

wherein passive components are integrated in the carrier substrate, the passive components being electrically connected to the component to form a circuit structure.