Configurable integrated circuit with a 4-to-1 multiplexer

• US 7,609,085 B1
• Filed: 03/08/2006
• Issued: 10/27/2009
• Est. Priority Date: 03/08/2006
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Schmit, Herman, Caldwell, Andrew, Teig, Steven
• Primary Examiner(s): Tan, Vibol
• Assistant Examiner(s): Tabler, Matthew C
• Application Number:
  US11/371,198
• Time in Patent Office: 1,329 Days
• Field of Search: 326 38- 41, 326/113
• US Class Current: 326/38
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources

Abstract

Some embodiments provide a configurable integrated circuit with a tile. The tile has a first input multiplexer (IMUX), a second IMUX, and a look up table (LUT). The first IMUX is configured as a two-input multiplexer. The second IMUX is also configured as a two-input multiplexer. The LUT is also configured as a third two-input multiplexer. An output of the first IMUX is connected to the first input of the LUT, an output of the second IMUX is connected to the second input of the LUT. A third input of the LUT accepts a selection bit.

Claims

1. A four-to-one multiplexer, comprising:

a) a first configurable input select multiplexer comprising more than two data inputs, a first set of selection inputs, and a second set of selection inputs, wherein said first configurable input select multiplexer is configured to operate as a first two-data-input multiplexer by selection signals supplied to the first set of selection inputs from a first set of configuration storage elements, wherein the second set of selection inputs is for receiving user data to select between said two data inputs;

b) a second configurable input select multiplexer comprising more than two data inputs, a third set of selection inputs, and a fourth set of selection inputs, wherein said second configurable input select multiplexer is configured to operate as a second two-data-input multiplexer by selection signals supplied to the third set of selection inputs from a second set of configuration storage elements, wherein the fourth set of selection inputs is for receiving user data to select between said two data inputs; and

c) a configurable look up table, wherein said configurable look up table is configured to operate as a third two-data-input multiplexer by configuration data supplied from a third set of configuration storage elements,

wherein an output of said first configurable input select multiplexer is connected to a first input of said configurable look up table, wherein an output of said second configurable input select multiplexer is connected to a second input of said configurable look up table, and wherein a third input of said configurable look up table accepts a first selection bit.

2. The four-to-one multiplexer of claim 1, wherein said first configurable input select multiplexer is an eight-to-one multiplexer.

3. The four-to-one multiplexer of claim 1, wherein said configurable look up table has only three inputs.

4. The four-to-one multiplexer of claim 1, wherein said first configurable input select multiplexer receives a second selection bit, said second configurable input select multiplexer receives a third selection bit, and said second selection bit and said third selection bit come from a common source.

5. The four-to-one multiplexer of claim 1, wherein a first user signal selects between two inputs of said first two-input multiplexer and a second user signal selects between two inputs of said second two-input multiplexer.

6. The four-to-one multiplexer of claim 5, wherein the selection signals from the first set of configuration storage elements, the selection signals from the second set of configuration storage elements, and the configuration data supplied from the third set of configuration storage elements are not user signals.

7. The four-to-one multiplexer of claim 1, wherein said configurable look up table receives said first selection bit through a third configurable input select multiplexer.

22. The four-to-one multiplexer of claim 1, wherein a configurable input select multiplexer with more than two data inputs is configured to operate as a first two-data-input multiplexer when its configuration data causes it to ignore data coming in on all but two of the configurable input select multiplexer'"'"'s data inputs.

23. The four-to-one multiplexer of claim 1, wherein said first set of configuration storage elements comprise static random access memory (SRAM), said second set of configuration storage elements comprise SRAM, and said third set of configuration storage elements comprise SRAM.

8. An integrated circuit (IC) comprising:

a) a set of configuration storage elements for storing configuration data; and

b) a plurality of configurable circuits for configurably performing operations, said plurality of configurable circuits comprising;

i) a first configurable input select multiplexer comprising more than two data inputs, a first set of selection inputs, and a second set of selection inputs;

ii) a second configurable input select multiplexer comprising more than two data inputs, a third set of selection inputs, and a fourth set of selection inputs; and

iii) a configurable look up table,

said first configurable input select multiplexer for configuring as a first two-data-input multiplexer, said second configurable input select multiplexer for configuring as a second two-data-input multiplexer, said configurable look up table for configuring as a third two-data-input multiplexer, and

wherein an output of said first configurable input select multiplexer is connected to a first input of said configurable look up table, an output of said second configurable input select multiplexer is connected to a second input of said configurable look up table, and a third input of said configurable look up table is for accepting a first selection bit,

wherein the first configurable input select multiplexer is configured to operate as a two-data-input multiplexer by selection signals supplied to the first set of selection inputs from the set of configuration storage elements and a particular data input of the first configurable input select multiplexer is selected by a user signal supplied to the second set of selection inputs, wherein the second configurable input select multiplexer is configured to operate as a two-data-input multiplexer by selection signals supplied to the third set of selection inputs from the set of configuration storage elements and a particular data input of the second configurable input select multiplexer is selected by a user signal supplied to the fourth set of selection inputs, wherein the configurable look up table is configured to operate as a two-data-input multiplexer by supplying configuration data from the set of configuration storage elements to the configurable look up table.

9. The IC of claim 8, wherein said first configurable input select multiplexer is for receiving a second selection bit, said second configurable input select multiplexer is for receiving a third selection bit, and said second selection bit and said third selection bit come from a common source.

10. The IC of claim 8, wherein said user signal supplied to the second set of selection inputs of said first two-input multiplexer is a first user signal and said user signal supplied to the fourth set of selection inputs of said second two-input multiplexer is a second user signal.

11. The IC of claim 10, wherein the selection signals supplied to the first set of selection inputs from the set of configuration storage elements, the selection signals supplied to the third set of selection inputs from the set of configuration storage elements, and the configuration data from the set of configuration storage elements are not user signals.

12. The IC of claim 8, wherein said first configurable look up table receives said first selection bit through a third configurable input select multiplexer.

24. The IC of claim 8, wherein said first set of configuration storage elements comprise static random access memory (SRAM), said second set of configuration storage elements comprise SRAM, and said third set of configuration storage elements comprise SRAM.

13. A computer readable medium comprising computer program comprising sets of instructions which when executed on one or more processors configure a first configurable input select multiplexer with more than two data inputs, a first set of selection inputs, and a second set of selections inputs, a second configurable input select multiplexer with more than two data inputs, a third set of selection inputs, and a fourth set of selection inputs, and a configurable look up table, said sets of instructions comprising sets of instructions for:

a) defining a first configuration data set for configuring said first configurable input select multiplexer as a first two-data-input multiplexer by supplying said first configuration data set to said first set of selection inputs;

b) defining a second configuration data set for configuring said second configurable input select multiplexer as a second two-data-input multiplexer by supplying said second configuration data set to said third set of selection inputs; and

c) defining a third configuration data set for configuring said configurable look up table as a third two-data-input multiplexer, wherein an output of said first configurable input select multiplexer is connected to a first input of said configurable look up table, an output of said second configurable input select multiplexer is connected to a second input of said configurable look up table, and a third input of said configurable look up table is for accepting a first selection bit.

14. The computer readable medium of claim 13 further comprising instructions for:

a) providing a second selection bit to said second set of selection inputs of said first configurable input select multiplexer; and

b) providing a third selection bit to said fourth set of selection inputs of said second configurable input select multiplexer, wherein said second selection bit and said third selection bit come from a common source.

15. The computer readable medium of claim 14, wherein said common source comprises a source of user data.

16. An integrated circuit (IC), comprising:

a) a configurable look up table comprising a plurality of inputs, wherein said configurable look up table is for configuring as a first multiplexer, wherein when the configurable look up table is configured as said first multiplexer a first subset of the plurality of inputs of the configurable look up table act as data inputs of the first multiplexer and a second subset of the plurality of inputs of the configurable look up table act as selection lines of the first multiplexer;

b) a plurality of configurable input select multiplexers for providing inputs to the first subset of the plurality of inputs of the configurable look up table, wherein each of a first and a second configurable input select multiplexers comprises;

i) an output connected to an input of said first subset of the plurality of inputs of the configurable look up table;

ii) a set of more than two data inputs; and

iii) a plurality of selection lines, wherein at least a first selection line is for receiving configuration data from a set of configuration storage elements and at least a second selection line is for receiving user data.

17. The IC of claim 16, wherein said configuration data is not user data.

18. The IC of claim 16, wherein user data is data that is generated during run time of the IC.

19. The IC of claim 16, wherein the selection lines for receiving configuration data are for narrowing the set of selectable data inputs to two selectable data inputs and the selection line for receiving user data is for selecting a single data input from said two selectable data inputs.

25. The IC of claim 16, wherein said set of configuration storage elements of each of said plurality of configurable input select multiplexers comprise static random access memory (SRAM).

20. For a configurable integrated circuit (IC), a method of implementing a four-to-one multiplexer of a user design, said method comprising:

a) identifying a set of configurable components for implementing said four-to-one multiplexer, said configurable components comprising;

i) a configurable look up table configured as a first two-data-input multiplexer, wherein a first and a second input of said configurable look up table act as data inputs of said first two-data-input multiplexer and a third input of said configurable look up table acts as a selection line for said two-data-input multiplexer;

ii) a first configurable input select multiplexer comprising more than two data inputs a first set of selection inputs a second set of selection inputs and an output connected to the first input of said configurable look up table, wherein the second set of selection inputs is for receiving user data;

iii) a second configurable input select multiplexer comprising more than two data inputs, a third set of selection inputs, a fourth set of selection inputs, and an output connected to the second input of said configurable look up table, wherein the fourth set of selection inputs is for receiving user data; and

b) converting said identified components into said four-to-one multiplexer by supplying configuration data to sets of configuration storage elements associated with the configurable look up table, the first set of selection inputs of the first configurable input select multiplexer and the third set of selection inputs of the second configurable input select multiplexer.

21. The method of claim 20, wherein said identifying comprises determining which two data inputs of said more than two data inputs of said first configurable input select multiplexer will correspond to a first pair of data inputs of the four-to-one multiplexer in said user design, determining which two data inputs of said more than two data inputs of said second configurable input select multiplexer will correspond to a second pair of data inputs of the four-to-one multiplexer in said user design, and wherein said converting comprises configuring said first configurable input select multiplexer to operate as said first two-data-input multiplexer comprising said determined data inputs of the first configurable input select multiplexer and configuring said second configurable input select multiplexer to operate as said second two-data-input multiplexer comprising said determined data inputs of the second configurable input select multiplexer.

26. The configurable integrated circuit of claim 20, wherein the sets of configuration storage elements are directly connected to the associated configurable components.

27. The configurable integrated circuits of claim 26, wherein the sets of configuration storage elements comprise static random access memory (SRAM).

28. An integrated circuit (IC) comprising:

a) a set of configuration storage elements for storing configuration data; and

b) a plurality of configurable circuits for configuring as a M-to-one multiplexer, wherein M is equal to N times P, wherein N and P are integers, said plurality of configurable circuits comprising;

i) a set of P configurable input select multiplexers each comprising a first set of selection lines, a second set of selection lines, and more than N data inputs and each configured as a multiplexer with N data inputs by configuration data stored in the set of configuration storage elements which provides input to the first set of selection lines to reduce the number of potentially active data inputs of the multiplexer from more than N to N, wherein each selection line of the second set of selection lines is for receiving user data to further reduce the number of potentially active data inputs of the multiplexer; and

ii) a configurable look up table comprising more than P inputs, wherein said configurable look up table is for configuring as a P-data-input multiplexer, and wherein an output of each configurable input select multiplexer of said set of P configurable input select multiplexers is connected to one of a first set of inputs of the P-data-input multiplexer, wherein a second set of inputs of the P-input multiplexer is for accepting a set of selection bits, wherein the configurable look up table is configured to operate as a P-data-input multiplexer by supplying configuration data from the set of configuration storage elements to the configurable look up table configurable circuit.