Word line drivers having a low pass filter circuit in non-volatile memory device
First Claim
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1. A word line driver system coupled to an array of non volatile memory cells arranged in rows, each row of cells coupled by a word line, the word line driver system comprising:
- a voltage driver circuit operable to select and drive one of at least two voltages;
a low pass filter circuit coupled to the voltage driver circuit and having an output node, the low pass filter circuit operable to receive the selected voltage from the voltage driver circuit and to generate a filtered voltage at the output node; and
a plurality of word line control circuits coupled to the output node of the low pass filter circuit, each of the word line control circuits coupled to a respective word line in the array of the non-volatile memory cells and being operable to selectively couple the filtered voltage at the output node to the respective word line.
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Abstract
A word line driver system that utilizes a voltage selection circuit to supply one of several voltages to an output node coupled to a plurality of word line control circuits. Each word line control circuit is coupled to a respective word line in an array of non-volatile memory cells. The voltage selection circuit may include selectable low pass filters for filtering the supplied voltage supplied to the word lines in the array of memory cells without significantly increasing the overall die-size of the device.
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Citations
16 Claims
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1. A word line driver system coupled to an array of non volatile memory cells arranged in rows, each row of cells coupled by a word line, the word line driver system comprising:
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a voltage driver circuit operable to select and drive one of at least two voltages; a low pass filter circuit coupled to the voltage driver circuit and having an output node, the low pass filter circuit operable to receive the selected voltage from the voltage driver circuit and to generate a filtered voltage at the output node; and a plurality of word line control circuits coupled to the output node of the low pass filter circuit, each of the word line control circuits coupled to a respective word line in the array of the non-volatile memory cells and being operable to selectively couple the filtered voltage at the output node to the respective word line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A processor-based system comprising:
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a processor operable to process data and to provide memory commands and addresses; an input device coupled to the processor; an output device coupled to the processor; and a non-volatile memory device having a word line driver system coupled to an array of non-volatile memory cells arranged in rows, each row of cells coupled by a word line, the word line driver system comprising; a voltage driver circuit operable to select and drive one of at least two voltages; a low pass filter circuit coupled to the voltage driver circuit and having an output node, the low pass filter circuit operable to receive the selected voltage from the voltage driver circuit and to generate a filtered voltage at the output node; and a plurality of word line control circuits coupled to the output node of the low pass filter circuit, each of the word line control circuits coupled to a respective word line in the array of the non-volatile memory cells and being operable to selectively couple the filtered voltage at the output node to the respective word line. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification