Approach for managing interrupt load distribution
First Claim
1. A method for managing interrupt load distribution in a system comprising a plurality of processors, the method comprising:
- monitoring a load of a device operatively connected to the plurality of processors;
determining a mapping for the device that specifies at least two interrupt channels mapped to at least two of the plurality of processors;
determining that a number of interrupt channels supported by the device is less than the number of interrupt channels specified in the mapping;
in response to determining that the number of interrupt channels supported by the device is less than the number of interrupt channels specified in the mapping;
designating a particular processor of the plurality of processors as a managing processor to receive interrupts on a particular interrupt channel, wherein the particular interrupt channel is used by the device to send interrupts;
receiving, by the managing processor, interrupts from the device on the particular interrupt channel; and
distributing, by the managing processor, the interrupts to the other processors of the plurality of processors.
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Accused Products
Abstract
A method and apparatus for distributing multiple interrupts among multiple processors is disclosed. According to one embodiment, an interrupt daemon monitors the interrupt load among the processors that results from an initial mapping of the interrupts to the processors. The interrupt daemon determines whether there is a sufficient imbalance of the interrupts among the processors. If so, the interrupt daemon triggers a reassignment routine that generates a new mapping of the interrupts among the processors, and if not, the interrupt daemon goes to sleep for a specified time period. If the new mapping produces a sufficient improvement in the distribution of interrupts among the processors, based on the same criteria used to detect the imbalance, the new mapping is used by the central hub for subsequent distribution of interrupts to the processors. However, if the new mapping does not provide a sufficient improvement, the original mapping continues to be used.
44 Citations
16 Claims
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1. A method for managing interrupt load distribution in a system comprising a plurality of processors, the method comprising:
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monitoring a load of a device operatively connected to the plurality of processors; determining a mapping for the device that specifies at least two interrupt channels mapped to at least two of the plurality of processors; determining that a number of interrupt channels supported by the device is less than the number of interrupt channels specified in the mapping; in response to determining that the number of interrupt channels supported by the device is less than the number of interrupt channels specified in the mapping; designating a particular processor of the plurality of processors as a managing processor to receive interrupts on a particular interrupt channel, wherein the particular interrupt channel is used by the device to send interrupts; receiving, by the managing processor, interrupts from the device on the particular interrupt channel; and distributing, by the managing processor, the interrupts to the other processors of the plurality of processors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A machine-readable storage medium comprising a set of instructions which when executed by a machine, causes the machine to perform the following operations:
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monitoring a load of a device operatively connected to a plurality of processors in the machine; determining a mapping for the device that specifies at least two interrupt channels mapped to at least two of the plurality of processors; determining that a number of interrupt channels supported by the device is less than the number of interrupt channels specified in the mapping; in response to determining that the number of interrupt channels supported by the device is less than the number of interrupt channels specified in the mapping; designating a particular processor of the plurality of processors as a managing processor to receive interrupts on a particular interrupt channel, wherein the particular interrupt channel is used by the device to send interrupts; receiving, by the managing processor, interrupts from the device on the particular interrupt channel; and distributing, by the managing processor, the interrupts to the other processors of the plurality of processors. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification