Semiconductor device, manufacturing method and apparatus for the same

• US 7,611,041 B2
• Filed: 08/30/2007
• Issued: 11/03/2009
• Est. Priority Date: 01/15/2001
• Status: Active Grant

• Current Assignee: Godo Kaisha IP Bridge 1 (IP Bridge, Inc.)
• Original Assignee: NEC Corporation
• Inventors: Mikagi, Kaoru, Tao, Tetuya, Nishiyama, Tomohiro, Tago, Masamoto
• Primary Examiner(s): STONER, KILEY SHAWN
• Application Number:
  US11/847,687
• Publication Number:
  US 20070295786A1
• Time in Patent Office: 796 Days
• Field of Search: None
• US Class Current: 228/180.22
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: B23K 3/0623 for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05022 the internal layer being at least partially embedded in the surface
• CPC Class Codes: H01L 2224/05027 the internal layer extending out of an opening
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/11334 using preformed bumps
• CPC Class Codes: H01L 2224/11849 Reflowing
• CPC Class Codes: H01L 2224/119 Methods of manufacturing bump connectors involving a specific sequence of method steps
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/742 Apparatus for manufacturing bump connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01004 : Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01018 : Argon [Ar]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA

Abstract

A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming, on a wiring layer, an under-bump layer including first metal which is to form a first intermetallic compound at an interface through reaction with alloy solder;

supplying alloy solder having second metal different from main component metal added thereto; and

forming an alloy layer at an interface between the under-bump layer and the alloy solder by temporary fusing the alloy solder before cooling, wherein the alloy layer is a combination of the first intermetallic compound and a second intermetallic compound of the main component metal of the alloy solder and the second metal.

2. The semiconductor device manufacturing method according to claim 1, further comprising the step of, before forming the under-bump layer on the wiring layer, forming a contact layer for maintaining adhesion of the wiring layer and the under-bump layer.

3. The semiconductor device manufacturing method according to claim 1, wherein, when forming the solder bump, fusing of the alloy solder and deposition of the intermetallic compound are carried out by setting a temperature of an interface of the solder bump with the under-bump layer to lower than a temperature at the top of the solder bump on a specified temperature gradient.

4. The semiconductor device manufacturing method according to claim 1, wherein, when forming the solder bump, fusing of the alloy solder and deposition of the intermetallic compound are carried out by mounting the semiconductor device on a stage and causing a heating plate and a cooling plate movably provided at a lower part of the stage to be sequentially brought into contact with the stage.

5. The semiconductor device manufacturing method according to claim 4, wherein, at the time of heating using the heating plate, the semiconductor device is also heated from above by a non-contact heater provided at an upper part of the semiconductor device, and at the time of cooling using the cooling plate, while continuing heating using the non-contact heater, a temperature gradient between the top of solder bump and the interface of the solder bump with the under-bump layer is increased to promote deposition to the interface of the intermetallic compound with the under-bump layer.

6. The semiconductor device manufacturing method according to claim 4, wherein cooling using the cooling plate is carried out at cooling rate of at least 2°

C. per second.

7. The semiconductor device manufacturing method according to claim 4, wherein the heating using the heating plate and the cooling using the cooling plate are carried out under a vacuum atmosphere of a specified gas.

8. The semiconductor device manufacturing method according to claim 7, wherein the specified gas includes one of an inert gas and a reductive gas.

9. The semiconductor device manufacturing method according to claim 8, wherein the inert gas comprises one of nitrogen and argon, and the reductive gas comprises one of hydrogen and a mixed gas including hydrogen.

10. The semiconductor device manufacturing method according to claim 1, wherein the under-bump layer is formed from one of a single film and a laminate of a plurality of films made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by sputtering.

11. The semiconductor device manufacturing method according to claim 1, wherein the under-bump layer is formed from one of a single film and a laminate of a plurality of films made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by one of nonelectrolytic plating and electrolytic plating.

12. The semiconductor device manufacturing method according to claim 1, wherein the under-bump layer is formed as a laminate film of a film made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by the spattering and a film made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by one of nonelectrolytic plating and electrolytic plating.

13. The semiconductor device manufacturing method according to claim 1, wherein the alloy solder is supplied as one of a ball and pellet formed to a specified amount.

14. The semiconductor device manufacturing method according to claim 1, wherein the alloy solder is supplied as solder paste.

15. The semiconductor device manufacturing method according to claim 1, wherein the main component of the alloy solder is tin.

16. The semiconductor device manufacturing method according to claim 15, wherein a second main component of the alloy solder after tin is silver.

17. The semiconductor device manufacturing method according to claim 15, wherein copper is added to the alloy solder.