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MOS devices with source/drain regions having stressed regions and non-stressed regions

  • US 7,612,364 B2
  • Filed: 11/20/2006
  • Issued: 11/03/2009
  • Est. Priority Date: 08/30/2006
  • Status: Active Grant
First Claim
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1. A semiconductor structure comprising:

  • a semiconductor substrate;

    a gate stack on the semiconductor substrate;

    a source region comprising;

    a first stressor having at least a portion in the semiconductor substrate and adjacent to the gate stack;

    a first portion of the semiconductor substrate adjoining the first stressor and on an opposite side of the first stressor from the gate stack; and

    a drain region comprising;

    a second stressor having at least a portion in the semiconductor substrate and on an opposite side of the gate stack than the first stressor; and

    a second portion of the semiconductor substrate adjoining the second stressor and on an opposite side of the second stressor from the gate stack, wherein the first and the second stressors and the first and the second portions of the semiconductor substrate are doped with impurities of a same conductivity type.

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