Galvanically isolated charge balance system

• US 7,612,537 B2
• Filed: 01/25/2007
• Issued: 11/03/2009
• Est. Priority Date: 01/25/2007
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Hynes, Eamon, Wynne, John
• Primary Examiner(s): Tso; Edward
• Assistant Examiner(s): PIGGUSH, AARON C
• Application Number:
  US11/657,824
• Publication Number:
  US 20080180063A1
• Time in Patent Office: 1,013 Days
• Field of Search: 320/134, 320/135, 320/136, 320/166
• US Class Current: 320/134
• CPC Class Codes: H02J 7/0014 Circuits for equalisation of charge between batteries
• CPC Class Codes: H02J 7/0016 using shunting, discharge or bypass circuits
• CPC Class Codes: H02J 7/0048 Detection of remaining charge capacity or state of charge [SOC]

Abstract

A galvanically isolated charge balance system for a multicell battery includes a balancing circuit associated with each cell; each balancing circuit including a flying capacitor; a variable conductance switch; and a biasing circuit for the variable conductance switch; and a galvanically isolating MEMS switching device for selectively connecting the flying capacitor to a voltage supply to charge it to a predetermined voltage and to the biasing circuit for setting the variable conductance switch to adjust the charge on its associated cell to a preselected level.

Claims

1. A galvanically isolated charge balance system for a multicell battery comprising:

a balancing circuit associated with each cell;

each balancing circuit including a flying capacitor;

a variable conductance switch; and

a biasing circuit for said variable conductance switch; and

a galvanically isolating MEMS switching device for selectively connecting said flying capacitor to a voltage supply to charge it to a predetermined voltage and to said biasing circuit for setting said variable conductance switch to adjust the charge on its associated cell to a preselected level.

2. The galvanically isolated charge balance system of claim 1 in which said variable conductance switch includes a transistor.

3. The galvanically isolated charge balance system of claim 2 in which said transistor includes a MOSFET.

4. The galvanically isolated charge balance system of claim 1 in which said biasing circuit includes a capacitor.

5. The galvanically isolated charge balance system of claim 1 in which said predetermined voltage sets said variable conductance switch to discharge said cell to said predetermined level.

6. The galvanically isolated charge balance system of claim 1 in which said predetermined voltage sets said variable conductance switch to charge said cell to said predetermined level.

7. The galvanically isolated charge balance system of claim 1 in which said predetermined voltage sets said variable conductance switch to charge said cell to said predetermined level with a current level which is a predetermined percentage of an external current source.

8. A galvanically isolated charge balance system for a multicell battery comprising:

a balancing circuit associated with each cell;

each balancing circuit including a flying capacitor;

a variable conductance switch; and

a biasing circuit for said variable conductance switch; and

a galvanically isolating MEMS switching device for selectively connecting said flying capacitor to a voltage supply to charge it to a predetermined voltage and to said biasing circuit for setting said variable conductance switch to discharge its associated cell to a preselected level.

9. A galvanically isolated charge balance system for a multicell battery comprising:

a balancing circuit associated with each cell;

each balancing circuit including a flying capacitor;

a variable conductance switch; and

a biasing circuit for said variable conductance switch; and

a galvanically isolating MEMS switching device for selectively connecting said flying capacitor to a voltage supply to charge it to a predetermined voltage and to said biasing circuit for setting said variable conductance switch to charge its associated cell to a preselected level.