Switch circuit and method of switching radio frequency signals
First Claim
1. An improved voltage reduction circuit adapted to limit voltage levels within an electric circuit, wherein the voltage reduction circuit has an input voltage incident at an input node, an output voltage incident at an output node, and includes a plurality of MOSFET transistors, comprising:
- a) a series MOSFET transistor, wherein the series MOSFET transistor has a drain connected to the input node, a gate connected to circuit ground, and a source connected to the output node, and wherein the series MOSFET transistor has a first threshold voltage; and
b) a shunt MOSFET transistor, wherein the shunt MOSFET transistor has a drain connected to the output node, a gate connected to the input node, a source connected to ground, and wherein the shunt MOSFET transistor has a second threshold voltage.
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Accused Products
Abstract
A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The RF switch provides improvements in insertion loss, switch isolation, and switch compression. An improved voltage reducing circuit is described. The improved voltage reducing circuit limits voltages applied to selected nodes within the integrated circuit.
48 Citations
11 Claims
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1. An improved voltage reduction circuit adapted to limit voltage levels within an electric circuit, wherein the voltage reduction circuit has an input voltage incident at an input node, an output voltage incident at an output node, and includes a plurality of MOSFET transistors, comprising:
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a) a series MOSFET transistor, wherein the series MOSFET transistor has a drain connected to the input node, a gate connected to circuit ground, and a source connected to the output node, and wherein the series MOSFET transistor has a first threshold voltage; and b) a shunt MOSFET transistor, wherein the shunt MOSFET transistor has a drain connected to the output node, a gate connected to the input node, a source connected to ground, and wherein the shunt MOSFET transistor has a second threshold voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification