Method and system for configuring and using virtual pointers to access one or more independent address spaces

• US 7,613,881 B2
• Filed: 06/08/2005
• Issued: 11/03/2009
• Est. Priority Date: 06/08/2004
• Status: Expired due to Fees

• Current Assignee: David E. Kahn
• Original Assignee: DARTdevices Interop Corp.
• Inventors: Bernstein, Bruce, Mirabella, Richard, Pieb, Wolfgang, Illowsky, Daniel, Wenocur, Michael, Tiberi, Richard, Sidney, Raymond
• Primary Examiner(s): Verbrugge; Kevin
• Assistant Examiner(s): CARDWELL, ERIC
• Application Number:
  US11/148,978
• Publication Number:
  US 20060015665A1
• Time in Patent Office: 1,609 Days
• Field of Search: None
• US Class Current: 711/117
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 11/2082 Data synchronisation
• CPC Class Codes: G06F 16/2365 Ensuring data consistency and integrity
• CPC Class Codes: G06F 21/445 by mutual authentication, e.g. between devices or programs
• CPC Class Codes: G06F 21/6218 to a system of files or objects, e.g. local or distributed file system or database
• CPC Class Codes: G06F 2209/5015 Service provider selection
• CPC Class Codes: G06F 2221/2113 Multi-level security, e.g. mandatory access control
• CPC Class Codes: G06F 2221/2149 Restricted operating environment
• CPC Class Codes: G06F 8/10 Requirements analysis; Specification techniques
• CPC Class Codes: G06F 8/20 Software design
• CPC Class Codes: G06F 8/24 Object-oriented
• CPC Class Codes: G06F 8/30 Creation or generation of source code
• CPC Class Codes: G06F 8/41 Compilation
• CPC Class Codes: G06F 8/61 Installation
• CPC Class Codes: G06F 8/63 Image based installation; Cloning; Build to order
• CPC Class Codes: G06F 8/658 Incremental updates; Differential updates
• CPC Class Codes: G06F 8/71 Version control security arrangements therefor G06F21/57; Configuration management
• CPC Class Codes: G06F 9/449 Object-oriented method invocation or resolution
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system
• CPC Class Codes: G06F 9/5011 the resources being hardware resources other than CPUs, Servers and Terminals
• CPC Class Codes: G06F 9/5027 : the resource being a machine, e.g. CPUs, Servers, Terminals
• CPC Class Codes: G06F 9/5044 : considering hardware capabilities
• CPC Class Codes: G06F 9/5072 : Grid computing
• CPC Class Codes: G06F 9/54 : Interprogram communication
• CPC Class Codes: G06F 9/541 : via adapters, e.g. between incompatible applications
• CPC Class Codes: G06F 9/542 : Event management; Broadcasting; Multicasting; Notifications
• CPC Class Codes: H04L 65/1083 : In-session procedures
• CPC Class Codes: H04L 65/1094 : Inter-user-equipment sessions transfer or sharing
• CPC Class Codes: H04L 65/80 : Responding to QoS
• CPC Class Codes: H04L 67/10 : in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 67/104 : Peer-to-peer [P2P] networks
• CPC Class Codes: H04L 67/1068 : Discovery involving direct consultation or announcement among potential requesting and potential source peers
• CPC Class Codes: H04L 67/1072 : Discovery involving ranked list compilation of candidate peers
• CPC Class Codes: H04L 67/1095 : Replication or mirroring of data, e.g. scheduling or transport for data synchronisation between network nodes
• CPC Class Codes: H04L 67/14 : Session management for real-time applications in data packet communications networks H04L65/1066
• CPC Class Codes: H04L 67/51 : Discovery or management thereof, e.g. service location protocol [SLP] or web services
• CPC Class Codes: H04L 69/08 : Protocols for interworking; Protocol conversion
• CPC Class Codes: H04L 69/24 : Negotiation of communication capabilities
• CPC Class Codes: H04L 69/328 : in the presentation layer [OSI layer 6]
• CPC Class Codes: H04N 21/41265 : having a remote control device for bidirectional communication between the remote control device and client device unidirectional remote control device H04N21/42204
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/00 : Reducing energy consumption in communication networks

Abstract

System, device, method, and computer program and computer program products for providing communicating between devices having similar or dissimilar characteristics and facilitating seamless interoperability between them. Computer program software and methods of and systems and devices for sharing of content, applications, resources and control across similar and dissimilar permanently or intermittently connected electronic devices. Devices, systems, appliances, and the like communicating and/or interoperating within the framework provided. Virtual pointers such as Dart VirtualPointers provide structure and method for providing a simple and efficient way to access and use of one or more independent data address spaces in a single program. Virtual pointers used by software programs can adapt their use of main memory and storage devices to run efficiently on devices with differing sizes and speeds of a fast but small main memory and larger but slower storage.

Claims

1. A method of providing a plurality of large independent data access address spaces accessible within a software application program which efficiently make use of physical memory and or physical storage devices, the method comprising:

(1) specifying the properties of one or more independent address spaces;

(2) processing computer program code source statements into an executable image suitable to run on a particular software engine and or hardware processor which supports virtual pointer functionality;

(3) running the executable image on the particular software engine or hardware processor which executes an instruction set that resolves accesses to data referenced by the address space by using a fast access limited size main memory and slower access but larger size secondary storage; and

(4) for each independent address space, creating, and maintaining a number of real memory pages; and

when accesses to data logically in the independent address space are made, resolving the access and returning a data value or pointer to main memory containing the data value to the instruction or program making the access, using a multiple step procedure for moving data between main memory pages and secondary storage.

2. The method in claim 1, wherein the specifying the properties of one or more independent address spaces is performed using a computer programming language that supports statements conforming to a syntax and semantics for doing so.

3. The method in claim 1, wherein the processing comprises running software tools which process the source statements into an executable image suitable to run on a particular software engine and or hardware processor.

8. The method of claim 1, wherein one or more of the following are true in any combination:

specifying the properties of one or more independent address space is done using extensions to the language for interoperability source;

the software tools are the interoperability tools;

the particular software engine and or hardware processor is the interoperability engine; and

the instruction set is an interoperability instruction set.

11. The method of claim 1, wherein the properties are optionally selected to be one or more of the following in any combination:

(a) number of real memory pages;

(b) a binary flag indicating if the values in the address space are to be automatically saved along with the application;

(c) the size of the real memory pages; and

(d) the method for determining the above properties when not explicitly provided in the statement.

12. The method of claim 11, wherein the real memory page size is determined by one or more of the following factors or any combination thereof:

(i) amount of available real memory;

(ii) block size of flash media or other media type;

(iii) random access memory (RAM) buffer size of the physical storage; and

(iv) speed of reading or writing of data to main memory and or physical storage.

13. The method of claim 12, wherein the main memory page size matches the size of the physical unit of access of a secondary storage device, or is an integer fractional size of the physical unit of access of a secondary storage device.

14. The method of claim 1, wherein the specification is done via a #pragma statement of a C language or C++ language or extended language for processing by the interoperability.

15. The method claim of 1, wherein the method advantageously provides one or more of the following properties in any combination:

(a) multiple large independent address spaces;

(b) application specific control over the number of real memory pages for each individual independent address space;

(c) device specific control over real memory page sizes to match storage device performance characteristics;

(d) no need for the programmer to predict or administrate the amount of memory needed for data structures or lists because the virtual pointer automatically logically includes values for an address space larger than the expected largest such data structure or list used to access it;

(e) automatic saving of data in a form independent of page sizes or number of pages;

(f) effective caching of data from a larger and possibly slower data store with a minimal amount of precious RAM allowing applications to run as if they have much larger RAM memories than they physically do; and

(g) a base infrastructure for indexed database operations where the data and indexes are kept in different virtual pointer address spaces.

16. The method of claim 1, wherein access to data values in the address space is through the use of one or more of the following in any combination:

(a) reserved pointer types;

(b) reserved pointer values;

(c) the values used as pointer values; and

(d) reserved instruction addressing modes.

17. The method of claim 1, wherein physical memory and storage resources are one or more of the following in any combination:

(a) flash memory;

(b) hard disk;

(c) optical storage media;

(d) solid state storage media; and

(e) any other physical medium which is slower than the main memory attached to a processor.

18. The method of claim 1, wherein efficiency is achieved for one or more of in any combination of factors:

(a) a programmer does not need to write explicit code to do one or more of the following;

(i) allocate and reallocate memory in ways that would otherwise be necessary;

(ii) perform or specify explicit file operations; and

(iii) storing and restoring of data in the independent address spaces where such storing is done automatically as part of saving the application;

(b) a programmer does not need to specify or consider the amount of main memory needed;

(c) a programmer does not need to specify or consider the speed of the application'"'"'s operations;

(d) a programmer does not need to specify or consider the application or user interface response times as experienced by a human user;

(e) a programmer does not need to specify or consider the speed of access to data and or of the process for locating and or collating data;

(f) improving the lifetime of secondary storage devices by reducing the number of block accesses; and

(g) the amount of code needed in an application based on the reduced need as in item a) of this list.

24. The method in claim 1, wherein the moving main memory pages to secondary storage further comprises:

determining if the data is in one of the main memory pages or in secondary storage;

if the data is in one of the main memory pages then return the value of the data or a pointer to the data;

if the data is in secondary storage then reading or otherwise loading the data into the selected memory page, and returning the value of the data in the selected memory page or a pointer to the data in the selected memory page.

25. The method in claim 1, wherein the moving main memory pages to secondary storage further comprises:

(a) determining if the data is in one of the main memory pages;

(b) if the data is in one of the main memory pages then;

(i) if the access may change the value of the data, mark the main memory page as dirty; and

(ii) return the value of the data or a pointer to the data;

(c) if the data is not in one of the main memory pages then;

(i) determining if the data is in the secondary storage;

(d) if the data is in the secondary storage;

(i) selecting a real memory page and starting address that will hold the block of data that contains the data;

(ii) if the selected real memory page is marked as dirty then writing or causing writing of the values to secondary storage;

(iii) reading or otherwise loading the data into the real memory page;

(iv) marking the data in the real memory page as being not dirty; and

(v) returning the value of the data now in the selected main memory page or a pointer to the data now in the selected main memory page; and

(e) if the data is not in the secondary storage, perform one or more of the following;

(1) returning a default value;

(2) returning a pointer to a main memory data element that contains a default value; and

(3) returning with an access to unknown data code or other indicator that there is no known value for the data.

4. A method of providing a plurality of large independent data access address spaces accessible within a software application program which make use of physical memory and or physical storage devices, the method comprising:

specifying the properties of one or more independent address spaces;

processing computer program code source statements into an executable image suitable to run on a particular software engine and or hardware processor which supports virtual pointer functionality; and

running the executable image on the particular software engine or hardware processor which executes an instruction set that resolves accesses to data referenced by the address space by using a fast access limited size main memory and slower access but larger size secondary storage; and

(1) for each independent address space, creating, and maintaining a number of real memory pages all of a single specific size;

(2) when accesses to data logically in the independent address space are made, resolving the access and returning a value or pointer to main memory containing the value to the instruction or program making the access, using the following procedure;

(a) determining if the data is in one of the main memory pages;

(b) if the data is not in one of the main memory pages performing the following procedure;

(i) determining if the data is in the secondary storage;

(ii) if it is not in the secondary storage, perform one or more of the following procedures;

(1) return a default value;

(2) return with a pointer to a main memory data element that contains a default value; and

(3) return with an access to unknown data code or other indicator that there is no known value for the data;

(c) if the data is in the secondary storage, perform the following procedure;

(i) selecting a real memory page and starting address that will hold the block of data that contains the data value needed;

(ii) if the selected real memory page is marked as dirty then writing out or otherwise cause the values in the selected real memory page to be written to secondary storage;

(iii) reading or otherwise loading the contiguous range of addressable data into the real memory page that is the size and has the same new starting address as the real memory page;

(iv) mark the data in the real memory page as being not dirty; and

(v) return the value of the data now in the selected main memory page or a pointer to the data now in the selected main memory page; and

(d) if the data is in one of the main memory pages perform the following procedure;

(i) if the access is known to be one that indicates that the consumer of the value may change the value of the data, mark the main memory page as dirty; and

(ii) return the value of the data main memory page or a pointer to the data in the main memory page that is found to include the data.

5. The method of claim 4, wherein if the data is not in a real memory page and the data is not on the secondary storage, proceed as if the data was in secondary storage, except that instead of loading the selected real memory page with data from the secondary storage, fill the selected real memory page with a default value.

6. The method of claim 5, wherein the method is only used if any one of the access to the real memory page is known to be one that indicates that the consumer of the value may change the value of the data.

7. The method of claim 4, wherein the default value is optionally selected to be one of the following values:

zero (“

0”

), one (“

1”

), all bits set to one, all bits set to zero, negative one, the most significant bit set to 1 and all others set to zero, a particular value reserved to indicate an uninitialized value or an unknown value.

9. The method of claim 4, wherein the values kept in secondary storage are logically overwritten by the presence of data stored in a superseding file.

10. The method of claim 4, wherein the values are initially kept inside a saved image and when a value is changed by the execution, instead of having to rewrite or copy and replace the data values in the image the data is logically overwritten by a descriptor file with the same starting address as the block of data corresponding to a block which might be loaded into real memory pages.

19. The method of claim 4, wherein a SAVE_INSTRUCTION and or BUILTIN_INSTRUCTION is used to automatically save the data.

20. The method of claim 4, wherein the data values are saved in association with possibly sparse sets of contiguous ranges of values.

21. The method of claim 20, wherein the data values are selectively restored or not restored based on the value of an autoload flag bit in the flags word of a record for each independent address space during loading.

22. A computer program product for use in conjunction with a computer system or information appliance, the computer program product comprising a computer readable storage medium and a computer program mechanism embedded therein, the computer program mechanism comprising:

a program module that directs the computer system or information appliance to function in a specified manner for providing a plurality of large independent data access address spaces accessible within a software application program which make use of physical memory and or physical storage devices, the program module including instructions for;

(1) specifying the properties of one or more independent address spaces;

(2) processing computer program code source statements into an executable image suitable to run on a particular software engine and or hardware processor which supports virtual pointer functionality; and

(3) running the executable image on the particular software engine or hardware processor which executes an instruction set that resolves accesses to data referenced by the address space by using a fast access limited size main memory and slower access but larger size secondary storage; and

(4) for each independent address space, creating, and maintaining a number of real memory pages; and

when accesses to data logically in the independent address space are made, resolving the access and returning a data value or pointer to main memory containing the data value to the instruction or program making the access, using a multiple step procedure for moving data between main memory pages and secondary storage.

23. A virtual pointer data structure, comprising:

a memory storage;

a plurality of pointers stored in the memory storage;

the pointers permitting specification and access to a plurality of large independent data access address spaces accessible within a software application program which make use of physical memory and physical storage devices;

the pointers specifying the properties of one or more independent address spaces; and

the pointers permitting resolution of access to data referenced by the address space by using a fast access limited size main memory and slower access but larger size secondary storage;

wherein each virtual pointer is specified with a plurality of parameters including;

(i) a name of a pointer variable that will hold the starting address of a virtual address space when a program using or referencing the virtual pointer starts execution;

(ii) a suggested number of real memory pages for use;

(iii) a binary flag indicating if values in the address space are to be automatically saved along with the application; and

(iv) a suggested size of the real memory pages.

26. A method of providing a plurality of large independent data access address spaces accessible within an application program which makes use of physical memory and or physical storage devices, the method comprising:

(1) specifying at least one application program source language specified pointer variables that is to be mapped to an independent address space;

(2) compiling the application program source to create compiled instructions where the specified pointer variables are accessed by specially encoded and formatted address fields of the compiled instructions generated by the compiler carrying out the specifying in the source code the compiler compiles;

(3) running the compiled instructions on an instruction decoding engine which;

(i) decodes the specially formatted address fields; and

(ii) performs a intended read or write memory accesses using memory caching and paging to limit the number of read, write, and/or erase operations to a slower or limited read, write, and/or erase cycle secondary storage; and

(4) automatically saving the values stored by the application program of all such independent address spaces as part of a single save instruction that is part of the instruction decoding engine into permanent secondary storage.

27. The method of claim 26, wherein the single save instruction is implemented as part of the instruction decoding engine.

28. The method of claim 26, further comprising:

(5) automatically restoring the values stored by the application program of all saved independent address spaces that were previously saved when the application is loaded and run.

29. The method of claim 26, wherein the secondary storage is a slower or limited read, write, and/or erase cycle storage than a primary storage.

30. The method of claim 26, further comprising:

specifying the number of memory pages to be used by the engine.

31. The method of claim 26, further comprising:

specifying that the values in the memory are to be automatically saved when the application executes a save instruction that is carried out by the instruction decoding engine.

32. The method of claim 28, wherein the method application program is configured without explicit software program code for (a) managing file operations, (b) for allocating, managing or initializing memory, or (c) for saving and restoring application data.

33. The method of claim 26, wherein the instruction decoding engine supports automatic caching and paging based on memory accesses to the large independent data address spaces addressed by the specially formatted memory pointer portions of the instructions being decoded by the instruction decoding engine.

34. The method of claim 26, wherein the said engine is implemented in software.

35. The method of claim 26, wherein the said engine is implemented in hardware.

36. The method of claim 26, wherein the engine is implemented in software and hardware.

37. The method of claim 26, wherein the lifetime of flash memory is prolonged by taking advantage of conventional memory caching carried out by the engine which is decoding the instructions produced by the application program compiler.

38. The method of claim 26, where the engine is a device interoperability enabling engine.

39. The method of claim 26, where the said engine is an engine used to transform an independent device into an interoperability device so that formatted interoperability binary packaged software applications can find, qualify, form teams and spread code and data across the team of such transformed independent devices and run as if they were one process with one runtime that has access to the combined resources of all the teamed devices.

40. A method for constructing an application program code that may reference a large independent data access address space within the application program and that eliminates any need to specify without the need for explicit file operations, explicit memory allocations, explicit memory management, or explicit saving of data, the method comprising:

(1) specifying an application program source language pointer variable that is to be mapped to an independent address space;

(2) identifying a compiler that is configured to compile the application program source language to create compiled instructions in which the specified pointer variables refer to encoded and formatted address fields of the compiled instructions;

(3) configuring the compiled instructions for decoding during execution so that the execution will (i) decode the specially formatted address fields; and

(ii) perform an intended read or write memory accesses using memory caching and paging to limit the number of read, write, and/or erase operations to a secondary storage; and

(4) automatically saving the values stored by the application program of all such independent address spaces as part of a single save instruction that is part of the instruction decoding engine into permanent secondary storage.