Electronic device package manufacturing method and electronic device package

• US 7,615,406 B2
• Filed: 01/26/2006
• Issued: 11/10/2009
• Est. Priority Date: 01/28/2005
• Status: Active Grant

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Maegawa, Yukihiro, Higashi, Kazushi
• Primary Examiner(s): Ho; Tu-Tu V
• Application Number:
  US11/883,166
• Publication Number:
  US 20080277771A1
• Time in Patent Office: 1,384 Days
• Field of Search: 257/693, 257/E23.011, 257/690, 257/698, 257/E23.067, 438/106, 438/115, 438/667
• US Class Current: 438/106
• CPC Class Codes: H01L 2224/92144 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/053 the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: H03H 9/1092 the enclosure being defined by a cover cap mounted on an element forming part of the surface acoustic wave [SAW] device on the side of the IDT's

Abstract

By joining a lid member to a base member, internal electrodes put in contact with the lid member and an electronic device connected to the internal electrodes are placed in an internal space located in between the base member and the lid member. By performing etching from a surface of the lid member on a side opposite from the base member by a prescribed method, through holes that reach the surface of the internal electrodes are formed. A conductive material is applied to the through holes, and external electrodes connected to the internal electrodes are formed in a plane, completing a thin type electronic device package.

Claims

1. An electronic device package manufacturing method comprising:

joining a first member with a second member via a plurality of internal electrodes such that an electronic device connected to the plurality of internal electrodes is placed between the first member and the second member;

forming through holes between a surface of the second member that is opposite from a joint surface of the second member that is joined with the first member via the plurality of internal electrodes and joint surfaces of the plurality of internal electrodes at the second member; and

placing a conductive material in the through holes so as to be connected to the plurality of internal electrodes, to form a plurality of external electrodes on the surface of the second member that is opposite from the joint surface of the second member,

wherein, by joining (i) one of the first member and the second member that has an annular metal projection portion on a joint surface thereof that is joined with another of the first member and the second member via the plurality of internal electrodes, and (ii) the another of the first member and the second member that has an annular metal joining portion thereon that corresponds to the annular metal projection portion on the joint surface of the one of the first member and the second member, via the plurality of internal electrodes under a depressurized environment, such that the annular metal projection portion and the annular metal joining portion are metallically joined together by a metal joining at a normal temperature, the plurality internal electrodes and the electronic device are placed between the first member and the second member, forming a depressurized sealed space of an annular metal wall portion formed from the annular metal projection portion and the annular metal joining portion.

2. The electronic device package manufacturing method as defined in claim 1, wherein the joining of the first member with the second member is performed by joining the second member of a plate-shaped member to the first member via the plurality internal electrodes.

3. The electronic device package manufacturing method as defined in claim 2, further comprising reducing the second member in a thickness before forming the through holes and after joining the first member and the second member.

4. The electronic device package manufacturing method as defined in claim 3, wherein the second member is reduced in thickness such that the thickness of second member is not smaller than 25 μ

m and is not greater than 90 μ

m.

5. The electronic device package manufacturing method as defined in claim 1, wherein the through holes are formed by subjecting the second member to anisotropic etching.

6. The electronic device package manufacturing method as defined in claim 1, further comprising forming an insulating layer on an inner peripheral surface of each of the through holes of the second member that is formed of a conductive material or a semiconductive material, the insulating layer being formed before placing the conductive material in each of the through holes after forming the through holes at the second member.

7. The electronic device package manufacturing method as defined in claim 1, wherein a conductive paste as the conductive material is placed in each of the through holes.

8. The electronic device package manufacturing method as defined in claim 1, wherein the electronic device has a movable structure and is placed in the depressurized sealed space.

9. The electronic device package manufacturing method as defined in claim 1, wherein, by joining a joint surface of the first member of which the electronic device and a plurality of auxiliary electrodes connected to the electronic device are placed with the joint surface of the second member of which the plurality of internal electrodes are placed, the auxiliary electrodes and the plurality of internal electrodes are joined together.

10. An electronic device package manufacturing method comprising:

joining a first member with a second member via a plurality of internal electrodes such that an electronic device connected to the plurality of internal electrodes is placed between the first member and the second member;

forming through holes between a surface of the second member that is opposite from a joint surface of the second member that is joined with the first member via the plurality of internal electrodes and joint surfaces of the plurality of internal electrodes at the second member; and

placing a conductive material in the through holes so as to be connected to the plurality of internal electrodes, to form a plurality of external electrodes on the surface of the second member that is opposite from the joint surface of the second member,

wherein, by joining (i) one of the first member and the second member that has an annular metal projection portion on a joint surface thereof that is joined with another of the first member and the second member via the plurality of internal electrodes, and (ii) the another of the first member and the second member that has an annular metal joining portion thereon that corresponds to the annular metal projection portion on the joint surface of the one of the first member and the second member, via the plurality of internal electrodes under a depressurized environment, such that the annular metal projection portion and the annular metal joining portion are metallically joined together, the plurality of internal electrodes and the electronic device are placed between the first member and the second member, forming a depressurized sealed space of an annular metal wall portion formed from the annular metal projection portion and the annular metal joining portion, and

wherein, after the conductive material is placed in each of the through holes, a conductive cover portion, which covers exposed surfaces of the conductive material and each of the through holes, is placed on the surface of the second member that is opposite from the joint surface of the second member.

11. The electronic device package manufacturing method as defined in claim 10, wherein the conductive cover portion is formed by a PVD method.

12. An electronic device package comprising:

a first member;

a second member that is formed of a conductive material or a semiconductive material and that is facing the first member;

an electronic device arranged between the first member and the second member;

a plurality of internal electrodes connected to the electronic device and arranged between the first member and the second member, such that the plurality of internal electrodes join the first member and the second member together;

an insulating layer placed on inner peripheral surfaces of a plurality of through holes formed between a surface of the second member that is opposite from a joint surface of the second member that is joined with the first member via the plurality of internal electrodes and joint surfaces of the plurality of internal electrodes at the second member;

a plurality of external electrodes that are connected to the plurality of internal electrodes with a conductive material placed in the through holes on which the insulating layer is placed and that are formed on the surface of the second member that is opposite from the joint surface of the second member; and

an annular metal wall portion that forms a depressurized sealed space in which the plurality of internal electrodes and the electronic device are placed between the first member and the second member,

wherein the annular metal wall portion and the first member or the second member are metallically joined together by metal joining at a normal temperature.

13. The electronic device package as defined in claim 12,

wherein each of the external electrodes has a conductive cover portion that covers exposed surfaces of the conductive material and the through holes on the surface of the second member that is opposite from the joint surface of the second member,

wherein the conductive material placed in the through holes is a conductive paste, and

wherein the conductive cover is a metal film.

14. The electronic device package as defined in claim 12, wherein the second member is a plate-shaped member having a thickness that is not smaller than 25 μ

m and is not greater than 90 μ

m.