Assembly comprising functional block deposited therein

• US 7,615,479 B1
• Filed: 06/22/2005
• Issued: 11/10/2009
• Est. Priority Date: 11/08/2004
• Status: Expired due to Fees

• Current Assignee: RUIZHANG TECHNOLOGY LIMITED COMPANY
• Original Assignee: Alien Technology Corporation
• Inventors: Snyder, Eric Jonathan, Hadley, Mark A., Craig, Gordon S. W., Kanemoto, Eric, Swindlehurst, Susan, Gengel, Glenn, Herrmann, Scott, Liong, Lily, Tootoonchi, Ali A.
• Primary Examiner(s): Luu; Chuong A.
• Application Number:
  US11/159,526
• Time in Patent Office: 1,602 Days
• Field of Search: 438/458, 438/106, 438/107, 438/125, 438/758, 438/723, 438/667, 438/637
• US Class Current: 438/618
• CPC Class Codes: G06K 19/07718 the record carrier being manufactured in a continuous process, e.g. using endless rolls
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07752 using an interposer
• CPC Class Codes: G06K 19/07756 the connection being non-galvanic, e.g. capacitive
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/20 Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 2224/24227 the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
• CPC Class Codes: H01L 2224/76155 Jetting means, e.g. ink jet
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/82102 using jetting, e.g. ink jet
• CPC Class Codes: H01L 2224/83136 involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/83851 being an anisotropic conductive adhesive
• CPC Class Codes: H01L 2224/95085 being a liquid, e.g. for fluidic self-assembly
• CPC Class Codes: H01L 2224/95122 by applying vibration
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/95 : at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 29/0657 : characterised by the shape of the body
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01055 : Cesium [Cs]
• CPC Class Codes: H01L 2924/01057 : Lanthanum [La]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10158 : at the passive surface
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15155 : the shape of the recess being other than a cuboid
• CPC Class Codes: H01L 2924/15157 : Top view
• CPC Class Codes: H01L 2924/15165 : Monolayer substrate
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: Y10T 29/53178 : Chip component

Abstract

An electronic assembly. The assembly includes a substrate, a plurality of recessed regions, and a plurality of functional blocks. Each functional block is deposited in one of the recessed regions. A substantial amount of the plurality of functional blocks is recessed below a top surface of the substrate. Substantial amount is defined by any one of less than 10% of said functional blocks protrudes above the top surface of the substrate; less than 1% of the functional blocks protrudes above the top surface of the substrate; more than 90% of the functional blocks are recessed below the top surface of the substrate; or more than 99% of the functional blocks are recessed below the top surface of the substrate.

Claims

1. A method comprising:

forming a population of recessed regions on a substrate; and

depositing a population of functional blocks into said population of recessed regions;

each of said functional blocks is deposited in one of said recessed regions, a substantial amount of said population of functional blocks are recessed below a top surface of said substrate, wherein said substantial amount is defined by any one of less than 10% of said population of functional blocks protrudes above said top surface of said substrate, or more than 90% of said population of functional blocks are recessed below said top surface of said substrate,

wherein said population of recessed regions are formed using a step-and-repeat process in which one area of said substrate is formed with said population of recessed regions at a time and wherein forming said population of recessed regions on said substrate further comprising;

forming a master mold, said master mold comprising silicon wafer with recessed regions similar in shape to said recessed regions to be formed on said substrate;

forming a male copy mold from said master mold;

forming a female copy mold from said male copy mold;

forming a stamper copy mold from said female copy mold; and

using said stamper copy mold to form each of said population of recessed regions;

wherein each of said master mold, said male copy mold, said female copy mold, and said stamper copy mold comprises feature dimensions provided for each of said population of recessed regions, said feature dimensions for each of said population of recessed regions are about 0.5-1.0% larger than a desired corresponding feature of each of said population of recessed regions.

2. A method comprising:

forming a population of recessed regions on a substrate; and

depositing a population of functional blocks into said population of recessed regions;

each of said functional blocks is deposited in one of said recessed regions, a substantial amount of said population of functional blocks are recessed below a top surface of said substrate, wherein said substantial amount is defined by any one of less than 10% of said population of functional blocks protrudes above said to surface of said substrate, or more than 90% of said population of functional blocks are recessed below said top surface of said substrate,

wherein said population of recessed regions are formed using a step-and-repeat process in which one area of said substrate is formed with said population of recessed regions a time and wherein forming said population of recessed regions on said substrate further comprising;

forming a master mold, said master mold comprising silicon wafer and/or diamond turning machined metal substrate;

forming a master mold negative from said master mold;

forming a stamper copy mold from said master mold negative; and

using said stamper copy mold to form each of said population of recessed regions;

wherein each of said master mold, said mother copy mold, and said stamper copy mold comprises feature dimensions provided for each of said population of recessed regions, said feature dimensions for each of said population of recessed regions are about 0.5-1.0% larger than a desired corresponding feature of each of said population of recessed regions.

3. A method comprising:

forming a population of recessed regions on a substrate; and

depositing a population of functional blocks into said population of recessed regions;

each of said functional blocks is deposited in one of said recessed regions, a substantial amount of said population of functional blocks are recessed below a top surface of said substrate, wherein said substantial amount is defined by any one of less than 10% of said population of functional blocks protrudes above said top surface of said substrate, or more than 90% of said population of functional blocks are recessed below said top surface of said substrate,

wherein said population of recessed regions are formed using a step-and-repeat process in which one area of said substrate is formed with said population of recessed regions at a time and wherein forming said population of recessed regions on said substrate further comprising;

forming one or more stamper copy molds, each of said stamper copy molds comprises at least one feature for forming one of said population of recessed regions;

coupling said stamper copy molds together to form a mold having an array of said features, said array of said features being used to form an array of said population of recessed regions on said substrate;

wherein each of said features has dimensions for one of said population of recessed regions, said dimensions are about 0.5-1.0% larger than desired dimensions for each of said corresponding recessed regions.