Method for producing a semiconductor component

• US 7,615,847 B2
• Filed: 03/23/2007
• Issued: 11/10/2009
• Est. Priority Date: 03/23/2007
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Siemieniec, Ralf, Hirler, Franz, Zundel, Markus
• Primary Examiner(s): Pham; Thanh V
• Assistant Examiner(s): HENRY, CALEB E
• Application Number:
  US11/690,494
• Publication Number:
  US 20080230833A1
• Time in Patent Office: 963 Days
• Field of Search: 257/15, 257/607, 430/542
• US Class Current: 257/607
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor component having a semiconductor body having first and second semiconductor regions of a first conduction type, and a third semiconductor region of a second conduction type, which is complementary to the first conduction type. The second semiconductor region is arranged between the first and third semiconductor region and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region. In the second semiconductor region the dopant concentration is lower than the dopant concentration in the first semiconductor region. The dopant concentration in the second semiconductor region along a straight connecting line between the first and third semiconductor regions is inhomogeneous and has at least one minimum between the first and second junction regions, wherein the minimum is at a distance from the first and second junction regions.

Claims

1. A method for producing a semiconductor component comprising:

forming a first semiconductor region of a first conduction type;

forming a second semiconductor region of the first conduction type, wherein the second semiconductor region has a lower dopant concentration than the first semiconductor region;

forming a third semiconductor region of a second conduction type, which is complementary to the first conduction type,

wherein the semiconductor regions are formed such that

the second semiconductor region is arranged between the first and the third semiconductor regions, and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region, and

the second semiconductor region has an inhomogeneous dopant profile along a straight connecting line between the first and third semiconductor regions, with at least one minimum between the first and second junction region, wherein the minimum is at a distance from the first and second junction region;

providing a substrate having the first semiconductor region;

depositing a semiconductor layer of the first conduction type onto the first semiconductor region by means of epitaxy, wherein the semiconductor layer has an inhomogeneous dopant distribution with a minimum in the growth direction; and

forming the third semiconductor region spaced apart from the first semiconductor region in the upper region of the semiconductor layer with formation of the second junction region,

wherein during the deposition of the semiconductor layer the concentration of the supplied dopant is reduced only during a first time segment or during the entire deposition, and wherein afterward, by oxidation of uncovered surface regions of the semiconductor layer, dopant from the oxidized surface regions is segregated into non-oxidized regions in order to form the minimum.

7. The method as claimed in claim 1, wherein

the third semiconductor region is formed by implantation and indiffusion or by thermal activation of the dopant,

trench structures are produced in the semiconductor layer wherein the trench structures completely penetrate through the third semiconductor region that has been formed or is subsequently to be formed, and extend deeper than the third semiconductor region, wherein mesa structures remain between the trench structures, and

uncovered surfaces of the trench structures and the semiconductor layer or semiconducting regions are oxidized.

9. The method as claimed in claim 1, wherein the dopant concentration is varied in a stepwise fashion.

10. The method as claimed in claim 1, further comprising:

providing a semiconductor body of the first conduction type;

forming the third semiconductor region in that region of the semiconductor body which is near the top side, with formation of the second junction region with respect to the semiconductor body;

thinning the semiconductor body at the rear side thereof;

forming the first semiconductor region in that region of the semiconductor body which is near the rear side, so that the first semiconductor region has a higher dopant concentration than the semiconductor body; and

forming the inhomogeneous dopant profile of the first conduction type with a minimum in the semiconductor body between the first junction region and the second junction region by implantation.

11. The method as claimed in claim 10, wherein a rise in the dopant concentration of the first conduction type in the semiconductor body in the direction of the second junction region is formed by implantation into the top side of the semiconductor body prior to the thinning of the semiconductor body.

13. The method as claimed in claim 10, wherein a dopant of the first conduction type or protons are implanted for the purpose of forming the rise.

2. A method for producing a semiconductor component comprising:

forming a first semiconductor region of a first conduction type;

forming a second semiconductor region of the first conduction type, wherein the second semiconductor region has a lower dopant concentration than the first semiconductor region;

forming a third semiconductor region of a second conduction type, which is complementary to the first conduction type,

wherein the semiconductor regions are formed such that

the second semiconductor region is arranged between the first and the third semiconductor regions, and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region, and

the second semiconductor region has an inhomogeneous dopant profile along a straight connecting line between the first and third semiconductor regions, with at least one minimum between the first and second junction region, wherein the minimum is at a distance from the first and second junction region;

providing a substrate having the first semiconductor region;

depositing a semiconductor layer of the first conduction type onto the first semiconductor region by means of epitaxy, wherein the semiconductor layer has an inhomogeneous dopant distribution with a minimum in the growth direction; and

forming the third semiconductor region spaced apart from the first semiconductor region in the upper region of the semiconductor layer with formation of the second junction region,

wherein during the deposition of the semiconductor layer at least one dopant is supplied and the concentration of the supplied dopant is varied in such a way as to form the inhomogeneous dopant distribution with the minimum.

3. The method as claimed in claim 2, wherein

the concentration of the supplied dopant during the deposition of the semiconductor layer decreases down to a minimum value during a first time segment,

is then kept largely constant at the minimum value during a second time segment, and

is subsequently set to at least a largely constant value, which is higher than the minimum value, during a third time segment.

4. The method as claimed in claim 2, wherein

the concentration of the supplied dopant during the deposition of the semiconductor layer decreases down to a minimum value during a first time segment,

is then kept largely constant at the minimum value or reduced further during a second time segment, and

after the completion of the semiconductor layer at least one dopant of the first conduction type is implanted into the semiconductor layer.

5. The method as claimed in claim 4, wherein the implantation of the dopant of the first conduction type is carried out such that the maximum of the implantation lies substantially below the third semiconductor region.

8. The method as claimed in claim 2, wherein the decrease in the dopant concentration during the deposition of the semiconductor layer is set such that, in the semiconductor layer, the dopant concentration decreases from approximately 2*10¹⁷ cm⁻

3 at the first junction region to a value of between approximately 7*10¹⁵ cm<sup>−

3</sup> and approximately 1*10¹⁷ cm<sup>−

3</sup> at the minimum.

6. A method for producing a semiconductor component comprising:

forming a first semiconductor region of a first conduction type;

forming a second semiconductor region of the first conduction type, wherein the second semiconductor region has a lower dopant concentration than the first semiconductor region;

forming a third semiconductor region of a second conduction type, which is complementary to the first conduction type,

wherein the semiconductor regions are formed such that

the second semiconductor region is arranged between the first and the third semiconductor regions, and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region, and

the second semiconductor region has an inhomogeneous dopant profile along a straight connecting line between the first and third semiconductor regions, with at least one minimum between the first and second junction region, wherein the minimum is at a distance from the first and second junction region

providing a substrate having the first semiconductor region;

depositing a semiconductor layer of the first conduction type onto the first semiconductor region by means of epitaxy, wherein the semiconductor layer has an inhomogeneous dopant distribution with a minimum in the growth direction; and

forming the third semiconductor region spaced apart from the first semiconductor region in the upper region of the semiconductor layer with formation of the second junction region,

wherein during the deposition of the semiconductor layer the concentration of the supplied dopant is reduced only during a first time segment or during the entire deposition, and wherein afterward, by oxidation of uncovered surface regions of the semiconductor layer, dopant from the oxidized surface regions is segregated into the region of the second junction region to be formed, in order to form the minimum.

12. A method for producing a semiconductor component comprising:

forming a first semiconductor region of a first conduction type;

forming a second semiconductor region of the first conduction type, wherein the second semiconductor region has a lower dopant concentration than the first semiconductor region;

forming a third semiconductor region of a second conduction type, which is complementary to the first conduction type,

wherein the semiconductor regions are formed such that

the second semiconductor region is arranged between the first and the third semiconductor regions, and together with the first semiconductor region forms a first junction region and together with the third semiconductor region forms a second junction region, and

the second semiconductor region has an inhomogeneous dopant profile along a straight connecting line between the first and third semiconductor regions, with at least one minimum between the first and second junction region, wherein the minimum is at a distance from the first and second junction region;

providing a semiconductor body of the first conduction type;

forming the third semiconductor region in that region of the semiconductor body which is near the top side, with formation of the second junction region with respect to the semiconductor body;

thinning the semiconductor body at the rear side thereof;

forming the first semiconductor region in that region of the semiconductor body which is near the rear side, so that the first semiconductor region has a higher dopant concentration than the semiconductor body; and

forming the inhomogeneous dopant profile of the first conduction type with a minimum in the semiconductor body between the first junction region and the second junction region by implantation,

wherein a rise in the dopant concentration of the first conduction type in the semiconductor body in the direction of the first junction region is formed by implantation into the rear side of the semiconductor body after the thinning of the semiconductor body.

14. The method as claimed in claim 12, wherein a dopant of the first conduction type or protons are implanted for the purpose of forming the rise.