Phase synchronization circuit and electronic apparatus

• US 7,616,067 B2
• Filed: 09/10/2007
• Issued: 11/10/2009
• Est. Priority Date: 09/12/2006
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Matsumoto, Tomohiro, Ueno, Yosuke
• Primary Examiner(s): Pascal; Robert
• Assistant Examiner(s): JOHNSON, RYAN
• Application Number:
  US11/900,110
• Publication Number:
  US 20080061889A1
• Time in Patent Office: 792 Days
• Field of Search: 331/10, 331/11, 331/14, 331/16, 331/17, 331/18, 331/25, 331/44, 327/156, 327/157, 375/376
• US Class Current: 331/16
• CPC Class Codes: H03L 7/087 using at least two phase detectors or a frequency and phase detector in the loop
• CPC Class Codes: H03L 7/0898 the source or sink current values being variable H03L7/0896 takes precedence
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/1072 by changing characteristics of the charge pump, e.g. changing the gain

Abstract

A phase synchronization circuit and an electronic apparatus equipped with the phase synchronization circuit are provided. The phase synchronization circuit includes an oscillation unit, a phase comparison unit, a loop unit, a drive unit, an oscillation control signal unit, and a gain characteristic information obtaining unit. In the phase synchronization unit, a compensation signal is generated based on the gain characteristic information obtained by the gain characteristic information obtaining unit at the time of the usual phase synchronizing operation, and the drive unit is controlled by the compensation signal so that a product of the input signal-oscillation frequency conversion gain at the time of actual operation and the drive signal with which the drive unit drives the loop filter unit is constant.

Claims

1. A phase synchronization circuit comprising:

an oscillation unit for outputting an output oscillation signal with a predetermined frequency based on an oscillation control signal;

a phase comparison unit for comparing phases between the output oscillation signal outputted from the oscillation unit and an input signal inputted from outside;

a loop filter unit;

a drive unit for generating a drive signal based on a signal indicative of a phase comparison result outputted from the phase comparison unit, and driving the loop filter unit by the drive signal;

an oscillation control signal generation unit for generating an oscillation control signal based on a loop filter output signal outputted from the loop filter unit so that a phase of the output oscillation signal synchronizes with the phase of the input signal; and

a gain characteristic information obtaining unit for obtaining gain characteristic information which specifies an input signal-oscillation frequency conversion gain characteristic of the oscillation unit at the time of actual operation and for storing the gain characteristic information, the gain characteristic information being obtained by comparing an actual oscillation frequency and first and second target frequencies to find a difference, while supplying, by using the first and second target frequencies, a regulation signal of a predetermined magnitude and a compensation for oscillating the oscillation unit at each frequency as the oscillation control signal;

wherein a compensation signal is generated based on the gain characteristic information obtained by the gain characteristic information obtaining unit at a time of a usual phase synchronizing operation, and the drive unit is controlled by the compensation signal so that a product of the input signal-oscillation frequency conversion gain at a time of actual operation and the drive signal with which the drive unit drives the loop filter unit is constant;

wherein said gain characteristic information obtaining unit comprises;

a frequency comparison unit for comparing magnitudes between a frequency of the output oscillation signal outputted from the oscillation unit and each of the first target frequency and the second target frequency;

a frequency comparison result storage unit for storing a frequency comparison result by the frequency comparison unit in order of bit-weighting for each bit one by one with respect to each of the first target frequency and the second target frequency;

a frequency control signal generation unit for generating a first frequency control signal with respect to the first target frequency and a second frequency control signal with respect to the second target frequency, based on the frequency comparison result for each bit stored in the frequency comparison result storage unit;

a summing unit for summing up the first frequency control signal generated by the frequency control signal generation unit with respect to the first target frequency and the second frequency control signal generated by the frequency control signal generation unit with respect to the second target frequency, to be supplied to the oscillation control signal generation unit as a final frequency control signal; and

a path selection unit for switching the second frequency control signal generated by the frequency control signal generation unit with respect to the second target frequency so that the second frequency control signal is supplied to the summing unit at a time of obtaining the gain characteristic information and the second frequency control signal is supplied to the drive unit side at a time of the usual phase synchronizing operation.

2. The phase synchronization circuit according to claim 1, wherein the gain characteristic information obtaining unit includes a signal conversion unit for obtaining the compensation signal by taking K times the second frequency control signal obtained by the frequency control signal generation unit with respect to the second target frequency;

and

the K is set as a value obtained by dividing the product of the standard input signal-oscillation frequency conversion gain and the standard drive signal by a difference between the first target frequency and the second target frequency.

3. The phase synchronization circuit according to claim 2, wherein the frequency control signal generation unit outputs the first frequency control signal and the second frequency control signal in a current mode;

and

the signal conversion unit includes a current mirror circuit for processing the second frequency control signal in the current mode to perform the multiplication by K.

4. The phase synchronization circuit according to claim 2, wherein the frequency control signal generation unit outputs the first frequency control signal and the second frequency control signal in a voltage mode;

and

the signal conversion unit includes a voltage/current conversion unit for converting the second frequency control signal in the voltage mode into the second frequency control signal in a current mode, and a current mirror circuit for processing the second frequency control signal outputted from the voltage/current conversion unit in the current mode to perform the multiplication by K.

5. The phase synchronization circuit according to claim 3 or 4, wherein the drive unit includes a charge pump for outputting the drive signal as charge pump current, and a current source for generating a bias current for the charge pump, the bias current being 1/β

times the charge pump current; and

an amount of the bias current to be generated in the current source based on the gain characteristic information obtained in the gain characteristic information obtaining unit is controlled.

6. The phase synchronization circuit according to claim 1, wherein the gain characteristic information obtaining unit performs frequency search by using binary search by comparing frequencies until it reaches a predetermined number of bits while controlling weighting of the bit in a lowering direction at the time of obtaining the gain characteristic information, so that the frequency comparison result is stored in a corresponding bit of the frequency comparison result storage unit each time the frequency comparison is performed.

7. The phase synchronization circuit according to claim 6, wherein the frequency comparison unit counts a number of clocks of each target frequency for a predetermined period of a judging reference signal having a frequency fLow which is lower than the first and second target frequencies, of a frequency division ratio M1 with respect to the first target frequency, and of a frequency division ratio M2 with respect to the second target frequency, and performs the frequency comparison by comparing magnitudes between a count result and a judgment value according to the frequency division ratios,

assuming that a maximum value, which can be taken by variation, of the input signal-oscillation frequency conversion gain is K_oscimax, a value for specifying the first frequency control signal or the second frequency control signal of the most significant bit is S, and variation in the first frequency control signal or the second frequency control signal of the most significant bit is σ

, then a predetermined number N of bits, a scaling x for specifying weighting of the bit satisfy the following equation (A);

$\begin{array}{cc}\begin{array}{cc}{x}^{N-1}<br><br>S<<br><br>\frac{2<br><br>f_{\mathrm{Low}}}{K_{\mathrm{osci}<br><br><br><br>\max }}& \left(A<br><br><br><br>1\right)\\ \frac{\mathrm{\sigma <br><br>}}{S}<<br><br>\frac{2<br><br>x-2<br><br>x^N+x^{N-1}-1}{1-x^N}& \left(A<br><br><br><br>2\right)\end{array}\}& \left(A\right)\end{array}$

8. The phase synchronization circuit according to claim 1, wherein the oscillation unit is a current control oscillation unit oscillating based on the oscillation control current as an oscillation control signal, and

the frequency control signal generation unit generates the first frequency control signal and the second frequency control signal in a current mode.

9. The phase synchronization circuit according to claim 1, wherein the oscillation unit is an voltage control oscillation unit oscillating based on the oscillation control voltage as an oscillation control signal, and

the frequency control signal generation unit generates the first frequency control signal and the second frequency control signal in a voltage mode.

10. The phase synchronization circuit according to claim 1, wherein the frequency comparison result storage unit includes a binary counter unit for counting an inputted clock signal, and comprises:

a bit switch signal generation unit for generating a bit switch signal for each bit one by one, which specifies a switch timing for bit-weighting by count output of the binary counter unit, and

a data storage unit provided for each bit, which takes in and stores the frequency comparison result from the frequency comparison unit at the switch timing of the bit-weighting for the bit switch signal generated by the bit switch signal generation unit.

11. The phase synchronization circuit according to claim 1, wherein the frequency control signal generation unit comprises:

a 1-bit current source provided for each bit, which generates source-current or sink-current according to bit-weighting, and

a switching unit for performing the switching by allowing the 1-bit current source to generate either the source-current or the sink-current according to the data stored in the frequency comparison result storage unit, and generate the first frequency control signal and the second frequency control signal in a current mode by synthesizing and outputting input and output currents of the 1-bit current source for each bit.

12. The phase synchronization circuit according to claim 11, wherein the frequency control signal generation unit further includes a current/voltage conversion unit for generating the first frequency control signal and the second frequency control signal in a voltage mode by converting the first frequency control signal and the second frequency control signal in the current mode into a voltage signal.