Liquid crystal display device and fabricating method thereof

• US 7,616,284 B2
• Filed: 06/29/2005
• Issued: 11/10/2009
• Est. Priority Date: 12/31/2004
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Display Co., Ltd.
• Inventors: Ahn, Byung Chul, Lim, Byoung Ho, Ahn, Jae Jun
• Primary Examiner(s): Nelms; David
• Assistant Examiner(s): CHEN, WEN YING PATTY
• Application Number:
  US11/168,458
• Publication Number:
  US 20060146217A1
• Time in Patent Office: 1,595 Days
• Field of Search: 349/149
• US Class Current: 349/149
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136236 using a grey or half tone lithographic process
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence

Abstract

A liquid crystal display device, including: first and second substrates; a gate line on the first substrate; a data line crossing the gate line having a gate insulating film therebetween to define a pixel area; a pixel electrode formed of a transparent conductive film in a pixel hole passing through the gate insulating film in the pixel area; and a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer defining a channel between the source electrode and the drain electrode, wherein the semiconductor layer overlaps with a source and drain metal pattern including the data line, the source electrode and the drain electrode; and wherein the drain electrode protrudes from the semiconductor layer toward inside of the pixel electrode to be connected to the pixel electrode.

Claims

1. A liquid crystal display device, comprising:

first and second substrates;

a gate line on the first substrate;

a data line crossing the gate line having a gate insulating film therebetween to define a pixel area;

a pixel electrode formed of a transparent conductive film in a pixel hole passing through the gate insulating film in the pixel area;

a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer defining a channel between the source electrode and the drain electrode, wherein the semiconductor layer overlaps with a source and drain metal pattern including the data line, the source electrode and the drain electrode, and the drain electrode protrudes from the semiconductor layer toward inside of the pixel electrode to be connected to the pixel electrode;

a pad connected to at least one of the gate line and the data line, wherein the pad includes a lower pad electrode on the first substrate, a first contact hole passing through the gate insulating film to expose the lower pad electrode, and an upper pad electrode in the first contact hole connected to the lower pad electrode;

a data link extending from the lower pad electrode to overlap with the data line; and

a contact electrode in a second contact hole passing through the gate insulating film to expose the data link, thereby connecting the data link to the data line,

wherein a transparent conductive pattern including the pixel electrode, the upper pad electrode, and the contact electrode borders with the gate insulating film enclosing the corresponding hole.

2. The liquid crystal display device as claimed in claim 1, further comprising a storage electrode connected to the pixel electrode, wherein the storage electrode overlaps with the gate line having the gate insulating film to form a storage capacitor.

3. The liquid crystal display device as claimed in claim 2, wherein:

the semiconductor layer overlaps the storage electrode and the gate insulating film; and

the storage electrode protrudes from where it overlaps the semiconductor layer toward the pixel hole to connect to the pixel electrode.

4. The liquid crystal display device as claimed in claim 3, wherein the drain electrode and the storage electrode are connected to each other above the pixel electrode.

5. The liquid crystal display device as claimed in claim 1, wherein the lower pad electrode connects to the gate line.

6. The liquid crystal display device as claimed in claim 1, wherein the contact hole with the upper pad electrode extends along the data link to be integral to the second contact hole, and the upper pad electrode is integral to the contact electrode.

7. The liquid crystal display device as claimed in claim 1, wherein an area where the data line contacts the contact electrode is within an area to be sealed by a sealant upon joining of the first substrate with the second substrate.

8. The liquid crystal display device as claimed in claim 6, wherein an area where the data line contacts the contact electrode is within an area to be sealed by a sealant upon joining of the first substrate with the second substrate.

9. The liquid crystal display device as claimed in claim 1, wherein the channel of the thin film transistor includes a surface layer oxidized by a plasma surface treatment.

10. The liquid crystal display device as claimed in claim 1, wherein the semiconductor layer and the source and drain metal pattern have a shape.

11. The liquid crystal display device as claimed in claim 1, further comprising a protective film on the first substrate with an opening at a pad area.

12. The liquid crystal display device as claimed in claim 11, further comprising an alignment film on the protective film.

13. The liquid crystal display device as claimed in claim 12, wherein the protective film is formed with the same pattern as the alignment film.

14. The liquid crystal display device as claimed in claim 1, further comprising a protective film on the first substrate, the protective film having the same pattern as the second substrate and having an opening at a pad area.

15. The liquid crystal display device as claimed in claim 1, further comprising a liquid crystal layer between the first and second substrates.