Switched processor datapath
First Claim
1. A processing system comprising:
- a register file having an input and an output;
a routing unit having an input and an output, the input of the data routing unit coupled to the output of the register file, the routing unit receiving a data signal and selectively aligning and transferring the data signal;
a switch control unit having an input coupled to receive a control signal and an output coupled to provide a switch control signal, the switch control unit generating the switch control signal that specifies a routing operation or bitfield manipulation operation;
a switch having a first input, a second input and an output, the first input of the switch coupled to the output of the routing unit to receive the data signal, the second input of the switch coupled to the output of the switch control unit to receive the switching control signal, the switch controlling information pathways and perform routing functions on the data signal; and
an arithmetic logic unit having an input and an output, the input of the arithmetic logic unit coupled to the output of the switch and the output of the arithmetic logic unit coupled to the input of the register file.
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Abstract
Data-processing systems including processor datapaths that efficiently support computationally advantageous routing operations are disclosed. Data-processing methods based on such systems are also disclosed. An exemplary data-processing system includes a register file, a routing unit, a switch, and an arithmetic logic unit. The arithmetic logic unit may include a bitwise function unit, pipeline register, and an accumulator. The switch may have N data inputs and logM(N) switching stages. M may equal 2 or 4. In the case of log2(N) stages, each switching stage has N/2 switching cells. The routing unit may include a control logic that generates a control signal, and various logics that respectively operate on various bit groups of the control signal.
13 Citations
26 Claims
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1. A processing system comprising:
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a register file having an input and an output; a routing unit having an input and an output, the input of the data routing unit coupled to the output of the register file, the routing unit receiving a data signal and selectively aligning and transferring the data signal; a switch control unit having an input coupled to receive a control signal and an output coupled to provide a switch control signal, the switch control unit generating the switch control signal that specifies a routing operation or bitfield manipulation operation; a switch having a first input, a second input and an output, the first input of the switch coupled to the output of the routing unit to receive the data signal, the second input of the switch coupled to the output of the switch control unit to receive the switching control signal, the switch controlling information pathways and perform routing functions on the data signal; and an arithmetic logic unit having an input and an output, the input of the arithmetic logic unit coupled to the output of the switch and the output of the arithmetic logic unit coupled to the input of the register file. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A computer-implemented method of processing data for use with a system for routing and manipulating data, the method comprising:
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receiving data; selectively aligning and transferring the data to a switch using a routing unit; generating a switching control signal that specifies a routing operation or bitfield manipulation operation on the data; controlling information pathways and performing routing functions on the data using the switch in response to the switching control signal; and performing arithmetic or logic functions on the data using an arithmetic logic unit. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A processing system comprising:
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means for receiving data; means for selectively aligning and transferring the data to a switch using a routing unit; means for generating a switching control signal that specifies a routing operation or bitfield manipulation operation on the data; means for controlling information pathways and performing routing functions on the data responsive to the switching control signal using the switch; and means for performing arithmetic or logic functions on the data. - View Dependent Claims (23, 24, 25, 26)
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Specification