Method and apparatus for implementing packet command instructions for network processing

• US 7,617,332 B2
• Filed: 05/01/2003
• Issued: 11/10/2009
• Est. Priority Date: 05/01/2003
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Irish, John David, Haselhorst, Kent Harold, Ganfield, Paul Allen, Imming, Kerry Christopher
• Primary Examiner(s): Hafiz; Tariq
• Assistant Examiner(s): Phan; Dean
• Application Number:
  US10/427,865
• Publication Number:
  US 20040221066A1
• Time in Patent Office: 2,385 Days
• Field of Search: None
• US Class Current: 710/5
• CPC Class Codes: H04L 69/12 Protocol engines
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

A method, apparatus and computer program product are provided for implementing packet command instructions for network processing. A set of packet commands is provided. Each packet command defines a corresponding packet operation. A command from the set of packet commands is issued to perform the defined corresponding packet operation. A packet buffer structure hardware is provided for performing one or more predefined packet manipulation functions responsive to the issued command.

Claims

1. A method for implementing packet command instructions for network processing in a network processor system comprising the steps of:

providing a packet condition register to store packet status and packet state information;

providing a packet storage interrupt status register to store packet storage interrupt status information;

defining a set of packet commands, wherein

each said packet command is identified by opcode and defines a packet operation;

each said packet command enables predefined packet data manipulation functions by dataflow assist hardware with pointer manipulations;

said set of packet commands defines an application programming interface (API) to provide an abstraction layer for implementing each of a plurality of said predefined packet data manipulation functions by said dataflow assist hardware with pointer manipulations and for predefined network protocols;

issuing a packet command from said set of packet commands to perform said defined packet operation by writing said packet command to a packet command register; and

providing packet buffer structure hardware to store packet data, wherein said packet buffer structure hardware includes;

said dataflow assist hardware to provide said predefined packet data manipulation functions with pointer manipulations responsive to each said issued packet command, and

said dataflow assist hardware to perform said predefined packet data manipulation functions to utilize said packet condition register to store said packet status and said packet state information and said packet storage interrupt status register (PSISR) to store said packet storage interrupt status information.

2. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining an allocate packet command, said allocate packet command used to allocate a storage area for packet data.

3. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a split packet command, said split packet command used to split a source packet and into a pair of target packets.

4. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a copy packet command, said copy packet command used to copy a source packet and into a target packet.

5. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a join packets command, said join packets command used to append a source packet onto a target packet.

6. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a link packets command, said link packets command used to link a target packet into a source packet at a defined byte offset.

7. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a header delete command, said header delete command used to delete a defined number of bytes from a target packet.

8. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining an enqueue packet command, said enqueue packet command used to enqueue a source packet onto a queue.

9. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining an enqueue multicast packet command, said enqueue multicast packet command used to enqueue a source packet onto a queue and store a target packet for additional operations.

10. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a discard packet command, said discard packet command used to discard a source packet and free each allocated buffer for said discarded source packet.

11. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a packet accept command, said packet accept command used to remove a target packet from an ordering queue.

12. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a dequeue packet command, said dequeue packet command used to accept a target packet at a head of a receive queue.

13. A method for implementing packet command instructions for network processing as recited in claim 1 wherein the step of defining said set of packet commands includes defining a synchronize packet command, said synchronize packet command used to ensure each interrupt from outstanding commands are recorded.

14. A method for implementing packet command instructions for network processing as recited in claim 1 includes executing processor load and storing instructions using said packet buffer structure hardware to load packet data and to store packet data.

15. A method for implementing packet command instructions for network processing as recited in claim 1 includes providing said packet buffer structure hardware to perform hardware enforced ordering of multiple issued commands, and to perform reordering by hardware of multiple issued commands while appearance of program order is maintained.

16. A computer storage medium storing a computer program product for implementing packet command instructions for network processing in a network processor system, said computer program product including a plurality of computer executable instructions stored on said computer storage medium, wherein said instructions, when executed by the network processor system, cause the network processor system to perform the method including the steps of:

defining a set of packet commands, wherein

each said packet command is identified by opcode and defines a packet operation;

each said packet command enables predefined packet data manipulation functions provided by dataflow assist hardware with pointer manipulations;

said set of packet commands defines an application programming interface (API) to provide an abstraction layer for implementing each of a plurality of said predefined packet data manipulation functions by said dataflow assist hardware with pointer manipulations and for predefined network protocols;

issuing a packet command from said set of packet commands to perform said defined packet operation by writing said packet command to a packet command register; and

providing packet buffer structure hardware to store packet data, wherein said packet buffer structure hardware includes;

said dataflow assist hardware to provide said predefined packet data manipulation functions with pointer manipulations responsive to each said issued packet command, and

said dataflow assist hardware to perform said predefined packet data manipulation functions to utilize a packet condition register to store packet status and packet state information and a packet storage interrupt status register (PSISR) to store packet storage interrupt status information.

17. Apparatus for implementing packet command instructions for network processing in a network processor system comprising:

a set of packet commands, wherein

each said packet command is identified by opcode and defines a packet operation;

each said packet command enables predefined packet data manipulation functions by dataflow assist hardware with pointer manipulations;

said set of packet commands defines an application programming interface (API) to provide an abstraction layer for implementing each of a plurality of said predefined packet data manipulation functions by said dataflow assist hardware with pointer manipulations and for predefined network protocols;

a processor to issue a packet command from said set of packet commands to perform said defined packet operation by writing said packet command to a packet command register;

packet buffer structure hardware to store packet data, wherein said packet buffer structure hardware includes;

said dataflow assist hardware to provide said predefined packet data manipulation functions with pointer manipulations responsive to each said issued packet command by said processor; and

said dataflow assist hardware to perform said predefined packet data manipulation functions to utilize a packet condition register to store packet status and packet state information and a packet storage interrupt status register (PSISR) to store packet storage interrupt status information.

18. Apparatus for implementing packet command instructions as recited in claim 17 wherein said processor issues said command to a packet command register.