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Utilizing multiple test bitstreams to avoid localized defects in partially defective programmable integrated circuits

  • US 7,620,863 B1
  • Filed: 07/29/2008
  • Issued: 11/17/2009
  • Est. Priority Date: 10/01/2004
  • Status: Active Grant
First Claim
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1. A system, comprising:

  • an integrated circuit (IC) comprising a plurality of programmable resources, a configuration port coupled to the programmable resources, and a test port coupled to the programmable resources;

    a memory device coupled to the configuration port of the IC, the memory device comprising at least one test configuration bitstream and a plurality of associated user configuration bitstreams; and

    a configuration control device coupled to the configuration port of the IC and further coupled to the memory device, wherein;

    each user configuration bitstream implements a functionally equivalent design in the IC,each user configuration bitstream utilizes a different set of the programmable resources, andeach test configuration bitstream is configured and arranged to facilitate testing those of the programmable resources utilized by the associated user configuration bitstreams; and

    each user configuration bitstream enables the design to meet a common set of predetermined timing constraints when programmed into a fully functional IC.

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