Utilizing multiple test bitstreams to avoid localized defects in partially defective programmable integrated circuits
First Claim
1. A system, comprising:
- an integrated circuit (IC) comprising a plurality of programmable resources, a configuration port coupled to the programmable resources, and a test port coupled to the programmable resources;
a memory device coupled to the configuration port of the IC, the memory device comprising at least one test configuration bitstream and a plurality of associated user configuration bitstreams; and
a configuration control device coupled to the configuration port of the IC and further coupled to the memory device, wherein;
each user configuration bitstream implements a functionally equivalent design in the IC,each user configuration bitstream utilizes a different set of the programmable resources, andeach test configuration bitstream is configured and arranged to facilitate testing those of the programmable resources utilized by the associated user configuration bitstreams; and
each user configuration bitstream enables the design to meet a common set of predetermined timing constraints when programmed into a fully functional IC.
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Accused Products
Abstract
Methods and structures utilizing multiple configuration bitstreams to program integrated circuits (ICs) such as programmable logic devices, thereby enabling the utilization of partially defective ICs. A user design is implemented two or more times, preferably utilizing different programmable resources as much as possible in each configuration bitstream. The resulting user configuration bitstreams are stored along with associated test bitstreams in a memory device, e.g., a programmable read-only memory (PROM). Under the control of a configuration control circuit or device, the test bitstreams are loaded into a partially defective IC and tested using an automated testing procedure. When a test bitstream is found that enables the associated user design to function correctly in the programmed IC, i.e., that avoids the defective programmable resources in the IC, the associated user bitstream is loaded into the IC, the configuration procedure terminates, and the programmed IC begins to function according to the user design.
105 Citations
19 Claims
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1. A system, comprising:
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an integrated circuit (IC) comprising a plurality of programmable resources, a configuration port coupled to the programmable resources, and a test port coupled to the programmable resources; a memory device coupled to the configuration port of the IC, the memory device comprising at least one test configuration bitstream and a plurality of associated user configuration bitstreams; and a configuration control device coupled to the configuration port of the IC and further coupled to the memory device, wherein; each user configuration bitstream implements a functionally equivalent design in the IC, each user configuration bitstream utilizes a different set of the programmable resources, and each test configuration bitstream is configured and arranged to facilitate testing those of the programmable resources utilized by the associated user configuration bitstreams; and each user configuration bitstream enables the design to meet a common set of predetermined timing constraints when programmed into a fully functional IC. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification