Method for manufacturing a thin film transistor device
First Claim
1. A method for manufacturing a semiconductor device comprising:
- forming a first semiconductor film in a peripheral circuit region and a second semiconductor film in a pixel region over a substrate;
forming a gate insulating film over the first semiconductor film and the second semiconductor film;
forming a first gate electrode and a second gate electrode over the first semiconductor film and the gate insulating film, and a third gate electrode over the second semiconductor film and the gate insulating film;
forming a pair of first impurity regions and a pair of second impurity regions in the first semiconductor film, wherein one of the pair of first impurity regions is in physical contact with one of the pair of second impurity regions;
forming a pair of third impurity regions in the second semiconductor film; and
forming a wiring electrically connected to the one of the pair of first impurity regions and the one of the pair of second impurity regions.
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Abstract
A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
146 Citations
24 Claims
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1. A method for manufacturing a semiconductor device comprising:
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forming a first semiconductor film in a peripheral circuit region and a second semiconductor film in a pixel region over a substrate; forming a gate insulating film over the first semiconductor film and the second semiconductor film; forming a first gate electrode and a second gate electrode over the first semiconductor film and the gate insulating film, and a third gate electrode over the second semiconductor film and the gate insulating film; forming a pair of first impurity regions and a pair of second impurity regions in the first semiconductor film, wherein one of the pair of first impurity regions is in physical contact with one of the pair of second impurity regions; forming a pair of third impurity regions in the second semiconductor film; and forming a wiring electrically connected to the one of the pair of first impurity regions and the one of the pair of second impurity regions. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for manufacturing a semiconductor device comprising:
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forming a first semiconductor film in a peripheral circuit region and a second semiconductor film in a pixel region over a substrate; forming a pair of first impurity regions and a pair of second impurity regions in the first semiconductor film, wherein one of the pair of first impurity regions is in physical contact with one of the pair of second impurity regions; forming a pair of third impurity regions in the second semiconductor film; and forming a wiring electrically connected to the one of the pair of first impurity regions and the one of the pair of second impurity regions. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A method for manufacturing a semiconductor device comprising:
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forming a first semiconductor film in a peripheral circuit region and a second semiconductor film in a pixel region over a substrate; forming a gate insulating film over the first semiconductor film and the second semiconductor film; forming a first gate electrode and a second gate electrode over the first semiconductor film and the gate insulating film, and a third gate electrode over the second semiconductor film and the gate insulating film; selectively doping a N-type impurity into the first semiconductor film and the second semiconductor film; covering the second semiconductor film and a portion of the first semiconductor film by a photoresist; selectively doping a P-type impurity into a portion of the first semiconductor film which is not covered by the photoresist, whereby a pair of first impurity regions and a pair of second impurity regions are formed in the first semiconductor film and a pair of third impurity regions are formed in the second semiconductor film, and one of the pair of first impurity regions is in physical contact with one of the pair of second impurity regions; and forming a wiring electrically connected to the one of the pair of first impurity regions and the one of the pair of second impurity regions. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A method for manufacturing a semiconductor device comprising:
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forming a first semiconductor film in a peripheral circuit region and a second semiconductor film in a pixel region over a substrate; selectively doping a N-type impurity into the first semiconductor film and the second semiconductor film, covering the second semiconductor film and a portion of the first semiconductor film by a photoresist, selectively doping a P-type impurity into a portion of the first semiconductor film which is not covered by the photoresist, whereby a pair of first impurity regions and a pair of second impurity regions are formed in the first semiconductor film and a pair of third impurity regions are formed in the second semiconductor film, and one of the pair of first impurity regions is in physical contact with one of the pair of second impurity regions, and forming a wiring electrically connected to the one of the pair of first impurity regions and the one of the pair of second impurity regions. - View Dependent Claims (20, 21, 22, 23, 24)
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Specification