Wafer processing including dicing

• US 7,622,365 B2
• Filed: 02/04/2008
• Issued: 11/24/2009
• Est. Priority Date: 02/04/2008
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Parekh, Kunal R.
• Primary Examiner(s): Brewster; William M.
• Application Number:
  US12/025,623
• Publication Number:
  US 20090197394A1
• Time in Patent Office: 659 Days
• Field of Search: 438/462, 438/463, 438/464, 257/E21.523
• US Class Current: 438/462
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304

Abstract

Methods for processing semiconductor wafers are described herein. One embodiment includes removing portions of a first side of the semiconductor wafer to form a number of trenches of a particular depth in rows and columns. The method further includes forming a passivation layer on side walls of the number of trenches. The method also includes cutting a second side of the semiconductor wafer in rows and columns aligned with the number of trenches such that the semiconductor wafer singulates into a number of dice.

Claims

1. A method for processing a semiconductor wafer, comprising:

removing portions of a first side of the semiconductor wafer to form a number of trenches of a particular depth and a first width in rows and columns;

forming a passivation layer on side walls of the number of trenches; and

cutting a second side of the semiconductor wafer with a wafer saw blade having a second width greater than the first width in rows and columns aligned with the number of trenches such that the semiconductor wafer singulates into a number of dice.

2. The method of claim 1, wherein removing portions of the first side includes etching the number of trenches to the particular depth in a bulk silicon layer of the semiconductor wafer.

3. The method of claim 2, wherein etching the number of trenches includes etching the number of trenches such that a length of side walls of the number of trenches is between 30 and 60 micrometers.

4. The method of claim 3, wherein cutting the second side includes cutting with the wafer saw blade to connect with the number of trenches.

5. A method for processing a semiconductor wafer, comprising:

forming a number of electronic devices on a first side of the semiconductor wafer;

thinning a second side of the semiconductor wafer to a region between the first side and the second side of the semiconductor wafer in which no material has been removed from the material between the first side and the second side; and

etching in said region the first side of the semiconductor wafer in a number of rows and columns between the number of electronic devices to the second side of the semiconductor wafer after thinning the second side to singulate the semiconductor wafer into a number of dice wherein the etching is one of wet etching and dry etching.

6. The method of claim 5, wherein etching the first side of the semiconductor wafer includes dry etching the first side of the semiconductor wafer.

7. The method of claim 5, wherein the method includes placing one or more test circuits on the first side of the semiconductor wafer before etching the first side of the semiconductor wafer.

8. The method of claim 7, wherein the method includes testing certain of the number of electronic devices with the one or more test circuits before etching the first side of the semiconductor wafer.

9. A method for processing a semiconductor wafer, comprising:

forming a number of electronic devices on a first side of the semiconductor wafer;

removing portions of the first side of the semiconductor wafer to form a number of trenches to a particular depth and a first width in perpendicular rows and columns on the first side of the semiconductor wafer;

forming a passivation layer over the number of electronic devices and on side walls of the number of trenches;

thinning a second side of the semiconductor wafer; and

cutting the second side of the semiconductor wafer with a wafer saw blade having a second width greater than the first width in rows and columns aligned with the number of trenches such that the semiconductor wafer singulates into a number of dice corresponding to the number of electronic devices.

10. The method of claim 9, wherein cutting the second side of the semiconductor wafer includes cutting the second side of the semiconductor wafer to connect with the number of trenches.

11. The method of claim 9, wherein removing portions of the first side includes anisotropically dry etching the semiconductor wafer to form a number of trenches of a substantially similar depth.

12. The method of claim 11, wherein cutting the second side includes using the wafer saw blade having the second width between 25 and 50 micrometers, and etching includes forming the number of trenches to a width between 5 and 10 micrometers.

13. The method of claim 9, wherein:

forming a passivation layer includes depositing a passivation layer selected from the group including silicon nitride (SiN), silicon oxynitride (SiON), and titanium nitride (TiN); and

thinning the second side of the semiconductor wafer includes using a chemical mechanical planarization (CMP) process.

14. The method of claim 9, wherein the method includes:

placing a test circuit on the semiconductor wafer between at least two electronic devices; and

testing at least one of the number of electronic devices before etching the second side of the semiconductor wafer.

15. The method of claim 9, wherein cutting the second side includes aligning the wafer saw blade to one or more sidemarks on the first side of the semiconductor wafer.

16. A method for processing a semiconductor wafer, comprising:

forming a number of electronic devices on a first side of the semiconductor wafer;

etching a number of trenches to a particular depth in rows and columns on the first side of the semiconductor wafer;

depositing a polyimide layer to fill the number of trenches and cover the number of electronic devices;

thinning a second side of the semiconductor wafer to connect with the number of trenches;

applying an adhesive material to the second side of the semiconductor wafer; and

removing the entire polyimide layer to singulate the semiconductor wafer into a number of dice corresponding to the number of electronic devices.

17. The method of claim 16, wherein etching the number of trenches includes etching to a depth between 30 and 60 micrometers and a width between 5 and 10 micrometers.

18. The method of claim 16, wherein applying the adhesive layer includes applying a dicing tape.

19. The method of claim 16, wherein removing the entire polyimide layer includes removing the entire polyimide layer though application of an acid.

20. The method of claim 16, wherein removing the entire polyimide layer includes removing the entire polyimide layer through application of a frequency-based energy source.