Non-volatile memory device and method of manufacturing the same
First Claim
1. A non-volatile memory device comprising:
- a semiconductor substrate having a body, and a pair of fins projecting from the body and spaced apart opposite each other; and
a bridge insulating layer non-electrically connecting upper portions of the pair of fins to define a void between the pair of fins,at least one control gate electrode covering at least a portion of the outer surfaces of the pair of fins, extending over the bridge insulating layer, and isolated from the semiconductor substrate;
at least one pair of gate insulating layers between the at least one control gate electrode and the pair of fins; and
at least one pair of storage nodes between the at least one pair of gate insulating layers and the at least one control gate electrode,wherein outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void.
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Accused Products
Abstract
The non-volatile memory device may include a semiconductor substrate having a body and a pair of fins. A bridge insulating layer may non-electrically connect upper portions of the pair of fins to define a void between the pair of fins. Outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. The non-volatile memory device may further include at least one control gate electrode that may cover at least a portion of outer surfaces of the pair of fins, may extend over the bridge insulating layer, and may be isolated from the semiconductor substrate. At least one pair of gate insulating layers may be between the at least one control gate electrode and the pair of fins, and at least one pair of storage nodes may be between the at least one pair of gate insulating layers and the at least one control gate electrode.
232 Citations
13 Claims
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1. A non-volatile memory device comprising:
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a semiconductor substrate having a body, and a pair of fins projecting from the body and spaced apart opposite each other; and a bridge insulating layer non-electrically connecting upper portions of the pair of fins to define a void between the pair of fins, at least one control gate electrode covering at least a portion of the outer surfaces of the pair of fins, extending over the bridge insulating layer, and isolated from the semiconductor substrate; at least one pair of gate insulating layers between the at least one control gate electrode and the pair of fins; and at least one pair of storage nodes between the at least one pair of gate insulating layers and the at least one control gate electrode, wherein outer surfaces of the pair of fins are the surfaces of the pair of fins that do not face the void and inner surfaces of the pair of fins are the surfaces of the pair of fins that do face the void. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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Specification