NAND-type non-volatile memory devices having a stacked structure
First Claim
1. A NAND-type nonvolatile memory device, comprising:
- a semiconductor substrate;
a first ground selection line and a first string selection line disposed on the substrate in parallel to each other;
a plurality of parallel first word lines interposed on the substrate between the first ground selection line and the first string selection line;
a first impurity-doped region formed in the semiconductor substrate adjacent to the first word lines, the first ground selection line, and the first string selection line;
a first interlayer dielectric layer disposed on the first ground selection line, the first string selection line, the plurality of first word lines, and the semiconductor substrate;
an epitaxial contact plug that contacts the semiconductor substrate through the first interlayer dielectric layer;
a single crystalline semiconductor layer disposed on the first interlayer dielectric layer that contacts the epitaxial contact plug;
a plurality of parallel second word lines disposed on the single crystalline semiconductor layer;
a second impurity-doped region formed in the single crystalline semiconductor layer adjacent to the second word lines; and
a second interlayer dielectric layer disposed on the plurality of second word lines and the single crystalline semiconductor layer;
wherein the epitaxial contact plug comprises a first epitaxial contact plug that is located between the plurality of first word lines and the first ground selection line and a second epitaxial contact plug that is located between the plurality of first word lines and the first string selection line, the first epitaxial contact plug electrically connecting the first impurity-doped region between the plurality of first word lines and the first ground selection line to the second impurity-doped region on a first side of the second word lines and the second epitaxial contact plug electrically connecting the first impurity-doped region between the plurality of first word lines and the first string selection line to the second impurity-doped region on a second side of the second word lines.
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Accused Products
Abstract
A NAND-type nonvolatile memory device includes a semiconductor substrate and a first ground selection line and a first string selection line disposed on the substrate in parallel to each other. A plurality of parallel first word lines are interposed on the substrate between the first ground selection line and the first string selection line. A first impurity-doped region is formed in the semiconductor substrate adjacent to the first word lines, the first ground selection line, and the first string selection line. A first interlayer dielectric layer is disposed on the first ground selection line, the first string selection line, the plurality of first word lines, and the semiconductor substrate. An epitaxial contact plug contacts the semiconductor substrate through the first interlayer dielectric layer. A single crystalline semiconductor layer is disposed on the first interlayer dielectric layer that contacts the epitaxial contact plug. A plurality of parallel second word lines is disposed on the single crystalline semiconductor layer. A second impurity-doped region formed in the single crystalline semiconductor layer adjacent to the second word lines. A second interlayer dielectric layer is disposed on the plurality of second word lines and the single crystalline semiconductor layer.
25 Citations
5 Claims
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1. A NAND-type nonvolatile memory device, comprising:
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a semiconductor substrate; a first ground selection line and a first string selection line disposed on the substrate in parallel to each other; a plurality of parallel first word lines interposed on the substrate between the first ground selection line and the first string selection line; a first impurity-doped region formed in the semiconductor substrate adjacent to the first word lines, the first ground selection line, and the first string selection line; a first interlayer dielectric layer disposed on the first ground selection line, the first string selection line, the plurality of first word lines, and the semiconductor substrate; an epitaxial contact plug that contacts the semiconductor substrate through the first interlayer dielectric layer; a single crystalline semiconductor layer disposed on the first interlayer dielectric layer that contacts the epitaxial contact plug; a plurality of parallel second word lines disposed on the single crystalline semiconductor layer; a second impurity-doped region formed in the single crystalline semiconductor layer adjacent to the second word lines; and a second interlayer dielectric layer disposed on the plurality of second word lines and the single crystalline semiconductor layer; wherein the epitaxial contact plug comprises a first epitaxial contact plug that is located between the plurality of first word lines and the first ground selection line and a second epitaxial contact plug that is located between the plurality of first word lines and the first string selection line, the first epitaxial contact plug electrically connecting the first impurity-doped region between the plurality of first word lines and the first ground selection line to the second impurity-doped region on a first side of the second word lines and the second epitaxial contact plug electrically connecting the first impurity-doped region between the plurality of first word lines and the first string selection line to the second impurity-doped region on a second side of the second word lines. - View Dependent Claims (2, 3, 4, 5)
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Specification