Non-linear junction based electronics detection

• US 7,630,853 B2
• Filed: 07/25/2007
• Issued: 12/08/2009
• Est. Priority Date: 07/25/2007
• Status: Active Grant

• Current Assignee: Research Electronics International LLC (Heico Corporation)
• Original Assignee: Research Electronics International LLC (Heico Corporation)
• Inventors: Jones, Thomas H., Barsumian, Bruce R.
• Primary Examiner(s): Raymond; Edward
• Application Number:
  US11/782,636
• Publication Number:
  US 20090030622A1
• Time in Patent Office: 867 Days
• Field of Search: 702/117, 702/118, 702/176, 702/177, 702182-185, 702/188, 702/189
• US Class Current: 702/117
• CPC Class Codes: G01R 31/58 Testing of lines, cables or conductors testing of electric windings G01R31/72
• CPC Class Codes: H04M 1/24 Arrangements for testing
• CPC Class Codes: H04M 1/68 Circuit arrangements for preventing eavesdropping
• CPC Class Codes: H04Q 2213/1316 Service observation, testing
• CPC Class Codes: H04Q 2213/13166 Fault prevention
• CPC Class Codes: H04Q 2213/1319 Amplifier, attenuation circuit, echo suppressor
• CPC Class Codes: H04Q 3/0087 Network testing or monitoring arrangements

Abstract

Line anomalies on a line under test are detected by generating a test signal at a first power level and coupling the test signal to the line under test. A response level is received from the line under test at a second and third harmonic frequency of the first test signal. A second test signal is generated at an increased power level and coupled to the line under test and a response level from the line is received at a second and third harmonic frequency of the second test signal. The process is repeated by raising the power level of the test signal until a current level supplied to the line by a test signal exceeds an acceptable threshold level. The response levels are compared to stored data to locate any line anomalies present. The stored data represents harmonic response data obtained from the same line at a previous time. A graphical or mathematical representation of the response data is produced such that the response data can be easily compared to locate any anomalies.

Claims

1. A method for identifying harmonic producing line anomalies on a line under test, said method comprising the steps of:

generating a first test signal at a first power level and coupling said first test signal to said line under test;

receiving a response level from said line under test at a harmonic frequency of said first test signal; and

comparing said response level to a stored harmonic response level to identify said harmonic producing line anomalies.

2. The method of claim 1 further comprising the steps of:

generating a second test signal at a second power level and coupling said second test signal to said line under test;

receiving a second response level from said line under test at a harmonic frequency of said second test signal; and

creating a harmonic line signature based upon said first and second response levels.

3. The method of claim 1 wherein said stored harmonic response level represents harmonic response data from a line having a configuration similar to said line under test.

4. The method of claim 1 wherein the step of receiving a response level further comprises the step of receiving a response level at a second harmonic frequency of said test signal.

5. The method of claim 2 further comprising the step of measuring an AC current level supplied to said line by at least one of said first and second test signal and limiting the test signal power if said AC current level exceeds a threshold level.

6. The method of claim 1 wherein said line is a wire pair in a multiple wire pair cable further comprising the step of comparing said response level at said harmonic frequency to harmonic response levels from pairs within said multiple wire pair cable to locate said line anomalies.

7. The method of claim 1 further comprising comparing said response level to a response level obtained for said line under test at a different time to identify line configuration changes.

8. The method of claim 1 further comprising comparing a response level for a selected line pair in one cable to a corresponding pair in a different cable.

9. The method of claim 1 further comprising the step of generating a graphical representation of said response levels.

10. The method of claim 9 further comprising the step of performing a mathematical analysis of said graphical representation to generate mathematical equations corresponding to said graphical representation.

11. The method of claim 2 further comprising the step of performing a mathematical comparison between said harmonic line signature and a stored harmonic line signature.

12. The method of claim 11 further comprising the step of compensating for length differences in lines when comparing harmonic line signatures for different length cables.

13. A method of detecting harmonic producing line anomalies, said method comprising:

applying a test signal to a line being tested;

measuring a line response to said test signal at a harmonic frequency of said test signal;

creating harmonic line response data based upon said line'"'"'s response to said test signal at said harmonic frequency of said test signal; and

comparing said harmonic line response data to stored harmonic line response data to locate said harmonic producing line anomalies.

14. The method of claim 13 wherein applying a test signal further comprises applying a series of two or more increased power level test signals until a current supplied to said line by said test signal exceeds a current threshold.

15. The method of claim 13 further comprising the step of comparing said harmonic line response data to harmonic line response data from a similarly classified line.

16. The method of claim 13 further comprising the step of comparing said harmonic line response data to harmonic line response data collected from said line at a previous time.

17. A device including circuitry and software for detecting harmonic response generating line anomalies, said device comprising:

a signal generator for producing a test signal having a selected frequency content and power level;

a coupler for coupling said test signal to a line being tested;

a receiver that receives a line response to a test signal coupled to said line under test at a harmonic frequency of said test signal and produces harmonic line response data; and

a display that simultaneously displays a graphical representation of said harmonic line response data and stored harmonic line response data such that said harmonic response generating line anomalies can be identified.

18. The device of claim 17 further comprising bias circuitry for generating a bias voltage that is applied to said line being tested.

19. The device of claim 18 wherein said bias circuitry further comprises circuitry for generating an AC bias voltage.

20. The device of claim 17 further comprising software for mathematically comparing said harmonic line response data.

21. The device of claim 17 further comprising a controller for instructing said signal generator to generate signals having at least two different power levels and said receiver to store harmonic line response data at each power level.

22. The device of claim 17 further comprising current detection circuitry for detecting an amount of current supplied to said line being tested by said test signal.