KVM video and OSD switch

• US 7,631,337 B2
• Filed: 11/01/2006
• Issued: 12/08/2009
• Est. Priority Date: 01/05/2002
• Status: Expired due to Fees

• Current Assignee: Belkin International Incorporated (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Belkin International Incorporated (Hon Hai Precision Industry Co., Ltd.)
• Inventors: King, Randy J., Voll, Parker J.
• Primary Examiner(s): NGUYEN BA, HOANG VU A
• Application Number:
  US11/592,048
• Publication Number:
  US 20070079348A1
• Time in Patent Office: 1,133 Days
• Field of Search: 725/141, 345/698, 345/156, 455/333
• US Class Current: 725/141
• CPC Class Codes: G06F 3/023 Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes
• CPC Class Codes: G06F 3/038 Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
• CPC Class Codes: G06F 3/14 Digital output to display device ; Cooperation and interconnection of the display device with other functional units
• CPC Class Codes: G09G 2370/24 Keyboard-Video-Mouse [KVM] switch

Abstract

A high speed video switch in a KVM system using discrete Radio Frequency (RF) switch circuits. The RF switch circuits are configured into a multiplexed circuit to route video signals from a selected host computer to a target monitor. Voltage converters are used to provide control signals of the proper voltage to the RF switch circuits. Peaking operational amplifiers are used to compensate for the roll-off effect caused by the video connectors. An On Screen Display (OSD) switch using the RF switches is used to rapidly switch between the OSD data and host computer video for display to the target operator control center monitor.

Claims

1. A video switch for switching a video output of one of a plurality of computers to a target video destination capable of operating in accordance with a QXGA image resolution standard, the video switch comprising:

an integrated circuit comprising a microcontroller configured to emit two or more control signals;

a voltage converter having an input and an output, wherein a first video select signal of the two or more control signals is operably connected to the input of the voltage converter; and

a discrete radio frequency switch configured to switch at least a portion of the video output;

the discrete radio frequency switch having a control terminal, a video input terminal and a video output terminal,

wherein at least a portion of the video output of the one of the plurality of computers is operably connected to the video input terminal of the discrete radio frequency switch,

wherein the output of the voltage converter is operably connected to the control terminal of the discrete radio frequency switch and controls a switching of the discrete radio frequency switch, and

wherein the discrete radio frequency switch is configured to operate at a frequency greater than 250 megahertz for enabling the QXGA image resolution standard.

2. The video switch of claim 1, wherein the voltage converter comprises a resistor divider operably connected to a logic device.

3. The video switch of claim 1, wherein the voltage converter comprises a resistor divider operably connected to a comparator comprising an operational amplifier.

4. The video switch of claim 3, wherein:

an output of the operational amplifier is operatively connected to the control terminal of the discrete radio frequency switch; and

the output of the operational amplifier comprises a range of between approximately −

5 volts to approximately 0 volts and controls the switching of the discrete radio frequency switch.

5. The video switch of claim 1, wherein the discrete radio frequency switch is a depletion mode MOSFET device comprising a control terminal and actuatable with a negative voltage at the control terminal.

6. The video switch of claim 1, wherein:

the video switch is configured to operate the discrete radio frequency switch at approximately 388 megahertz.

7. The video switch of claim 1, wherein:

the microcontroller comprises a slave controller; and

the slave controller is coupled to a master controller comprising a field programmable gate array integrated circuit.

19. The video switch of claim 1, wherein:

the first and second RF switches comprise a depletion mode MOSFET device.

8. A video switch for switching a video signal of one of a plurality of computers to a target video destination capable of operating in accordance with a QXGA image resolution standard, the video switch comprising:

an integrated circuit configured to emit a video control signal;

an On Screen Display (OSD) video switch control circuit configured to receive the video control signal, the OSD video switch control circuit comprising;

a resistor divider network coupled between and in series with a first logic gate and a second logic gate;

the first logic gate having a video control input, an OSD control input, and a control output, the control output of the first logic gate having a first voltage level;

an input of the resistor divider network operably coupled to the control output of the first logic gate and receiving the first voltage level;

the second logic gate operably coupled to an output of the resistor divider network, the second logic gate having a control output, the control output of the second logic gate having a second voltage level; and

a discrete radio frequency switch operable at a frequency greater than 250 megahertz and having a control terminal, a video input and a video output,

wherein at least part of the video signal of one of the plurality of computers is operably connected to the video input of the discrete radio frequency switch, and

wherein the control output of the second logic gate is operably connected to the control terminal of the discrete radio frequency switch.

9. The video switch of claim 8, wherein the video output of the discrete radio frequency switch is operably connected to a peaking video amplifier circuit.

10. The video switch of claim 8, wherein:

the video switch is configured to operate the discrete radio frequency switch at approximately 388 megahertz.

11. The video switch of claim 8, wherein:

the first logic gate comprises a circuit configured to implement a logic NOR function; and

the second logic gate comprises a circuit configured to implement a logic OR function.

12. A video switch for connecting video signals of one of a plurality of computers to a target monitor capable of operating in accordance with a QXGA image resolution standard, said video switch comprising:

three sets of switch circuits for receiving red, green, and blue video signals of said plurality of computers respectively, each set of switch circuits comprising a plurality of discrete radio frequency switches; and

a control signal generating circuit comprising an integrated circuit configured to generate a plurality of host video select control signals,

each of said plurality of host video select control signals coupled to a corresponding voltage-level shifting circuit from the three sets of switch circuits,

an output of each voltage-level shifting circuit being used for controlling each corresponding discrete radio frequency switch in said three sets of switch circuits, and

each corresponding discrete radio frequency switch in said three sets of switch circuits is configured to operate at a frequency substantially greater than 250 megahertz for enabling the QXGA image resolution standard.

13. The video switch of claim 12, wherein:

the video switch is configured to operate the plurality of discrete radio frequency switches at approximately 388 megahertz.

14. A video switch for routing video data from a host computer to a target video destination in a KVM system, the video switch comprising:

a host computer port set comprising a first port configured to transmit a first video signal;

a master controller comprising one or more integrated circuits;

a first microcontroller coupled to the master controller and to the first port of the host computer port set;

a video multiplexer coupled to the first port of the host computer port set and to a microcontroller output of the first microcontroller, the video multiplexer comprising;

a multiplexer RF switch set having one or more radio frequency switches of the video multiplexer; and

a video bus selector coupled to the video multiplexer and configured to receive the first video signal from an output of the video multiplexer, the video bus selector comprising;

a bus selector RF switch set having one or more radio frequency switches of the video bus selector;

wherein the video switch is configured to support a frequency greater than 250 megahertz for the video data.

15. The video switch of claim 14, wherein:

the multiplexer RF switch set of the video multiplexer comprises;

a voltage level switching circuit comprising;

a comparator circuit; and

a first resistor divider comprising;

a first resistor divider input coupled to the microcontroller output of the first microcontroller; and

a first resistor divider output coupled to an input of the comparator circuit; and

a first RF switch comprising;

a first control terminal coupled to an output of the comparator circuit of the voltage level switching circuit;

a first video input terminal coupled to the first port and configured to receive the first video signal; and

a first video output terminal configured to transmit the first video signal through an output of the video multiplexer when the comparator circuit actuates the first control terminal to enable the first RF switch.

16. The video switch of claim 15, wherein:

the bus selector RF switch set of the video bus selector comprises;

a bus select logic circuitry comprising;

a second resistor divider coupled between and in series with a first logic device and a second logic device;

the first logic device comprising;

a video control input coupled to the master controller and configured to receive a video control signal from the master controller; and

an On Screen Display (OSD) control input to an OSD generator and configured to receive an OSD control signal from an OSD controller of the video switch;

the second resistor divider comprising;

a second resistor divider input coupled to an output of the first logic device; and

a second resistor divider output coupled to an input of the second logic device; and

a second RF switch comprising;

a second control terminal coupled to the second resistor divider output;

a second video input terminal configured to receive the first video signal from the output of the video multiplexer; and

a second video output terminal configured to transmit the first video signal through an output of the video bus selector when the bus select logic circuitry actuates the second control terminal to enable the second RF switch.

17. The video switch of claim 16, wherein:

the bus select logic circuitry is configured to disable the second RF switch when the OSD control signal is received by the first logic device.

18. The video switch of claim 16, wherein:

the first logic device of the bus select logic circuitry comprises a logic NOR functionality.

20. The video switch of claim 14, wherein:

the video switch is configured to support a frequency of approximately 388 megahertz for the video data.