Shielded gate trench (SGT) MOSFET devices and manufacturing processes

• US 7,633,119 B2
• Filed: 02/17/2006
• Issued: 12/15/2009
• Est. Priority Date: 02/17/2006
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Bhalla, Anup, Lui, Sik K
• Primary Examiner(s): Tran; Tan N
• Application Number:
  US11/356,944
• Publication Number:
  US 20070194374A1
• Time in Patent Office: 1,397 Days
• Field of Search: 257/330, 257/331, 257/332, 257/333, 257/334, 257/E29.201, 257/E29.26
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one of the cells constituting an active cell has a source region disposed next to a trenched gate electrically connecting to a gate pad and surrounding the cell. The trenched gate further has a bottom-shielding electrode filled with a gate material disposed below and insulated from the trenched gate. At least one of the cells constituting a source-contacting cell surrounded by the trench with a portion functioning as a source connecting trench is filled with the gate material for electrically connecting between the bottom-shielding electrode and a source metal disposed directly on top of the source connecting trench. The semiconductor power device further includes an insulation protective layer disposed on top of the semiconductor power device having a plurality of source openings on top of the source region and the source connecting trench provided for electrically connecting to the source metal and at least a gate opening provided for electrically connecting the gate pad to the trenched gate.

Claims

1. A semiconductor power device comprising:

a plurality of intersecting trenches formed in a semiconductor substrate wherein at least two intersecting trenches of said plurality of intersecting trenches are surrounded by a body region formed in said semiconductor substrate;

wherein said body region further encompassing a source region disposed immediately next said at least two intersecting trenches thus constituting active semiconductor power cells;

wherein said at least two intersecting trenches further comprising bottom shielded gate trench (SGT) structures filling with a conductive material; and

said bottom SGT structures are covered by insulation layers;

wherein said insulation layers shielding said bottom SGT structures from upper trench gates wherein said upper trench gates having a gate conductive material therein above said insulation layers to function as gate electrodes for said active semiconductor power cells; and

at least one intersecting trench of said plurality of intersecting trenches, which formed between said at least two intersecting trenches, are surrounded by said body region and said at least two intersecting trenches;

wherein a trench extension region extending from said at least one intersecting trench to one of said bottom shielded gate trench structures;

wherein a source contacting material completely filled in said at least one intersecting trench and completely filled said trench extension region; and

wherein said trench extension region completely formed in said semiconductor substrate;

wherein said trench extension region is electrically connected directly to said bottom SGT structure;

wherein said at least one intersecting trench and said at least two intersecting trenches are identical, and a source metal electrode are electrically connected directly to said source contacting material;

wherein said source metal electrode and said source contacting material are formed by different material layers.

2. The semiconductor power device of claim 1, further comprising:

insulation protective layers, which disposed on top surfaces of said semiconductor power device cells, formed a source contact opening for disposing said source metal electrode therein.

3. The semiconductor power device of claim 1, wherein said active power transistor cells are trenched metal oxide semiconductor field effect transistor cells.