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Parallel pipeline graphics system

DC CAFC
  • US 7,633,506 B1
  • Filed: 11/26/2003
  • Issued: 12/15/2009
  • Est. Priority Date: 11/27/2002
  • Status: Active Grant
First Claim
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1. A graphics chip comprising:

  • a front-end in the graphics chip configured to receive one or more graphics instructions and to output a geometry;

    a back-end in the graphics chip configured to receive said geometry and to process said geometry into one or more final pixels to be placed in a frame buffer;

    wherein said back-end in the graphics chip comprises multiple parallel pipelines;

    wherein said geometry is determined to locate in a portion of an output screen defined by a tile; and

    wherein each of said parallel pipelines further comprises a unified shader that is programmable to perform both color shading and texture shading.

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