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M+N bit programming and M+L bit read for M bit memory cells

  • US 7,633,798 B2
  • Filed: 11/21/2007
  • Issued: 12/15/2009
  • Est. Priority Date: 11/21/2007
  • Status: Active Grant
First Claim
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1. A method of operating a memory, comprising:

  • programming a selected memory cell of the memory to correspond to a selected state of a number of logic window states utilizing a selected programming threshold voltage level of a number of programming threshold voltage levels;

    wherein the number of logic window states is determined by dividing a usable threshold voltage range of the memory cell into a number of threshold voltage ranges; and

    wherein the number of programming threshold voltage levels is determined by dividing the usable threshold voltage range of the memory cell into the number of programming threshold voltage ranges, each having a corresponding nominal threshold voltage level, where the number of programming threshold voltage ranges is greater than the number of logic window states of the memory cell.

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