Receiver, in particular for mobile radio

• US 7,634,245 B2
• Filed: 07/26/2006
• Issued: 12/15/2009
• Est. Priority Date: 07/05/2000
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Infineon Technologies AG
• Inventors: Boos, Zdravko
• Primary Examiner(s): VO, NGUYEN THANH
• Application Number:
  US11/493,239
• Publication Number:
  US 20060264195A1
• Time in Patent Office: 1,238 Days
• Field of Search: 455/316, 455/314, 455/315, 455/255, 455/76, 375/316, 375/327, 375/310, 375/344, 375/362
• US Class Current: 455/255
• CPC Class Codes: H04B 1/403 using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes

Abstract

A receiver, in particular for mobile radio, includes a receiver branch with a mixer, downstream of an analog/digital converter. A reference generator generates a reference clock, which is fed to the converters or PLL synthesizers of the mixer by integral multiplication or division. As a result, a particularly energy-saving and space-saving circuit configuration is realized, which has a low level of mutual interference between the signals and is suitable (in particular for Universal Mobile Telecommunication System, UMTS). In a preferred embodiment, the receiver is developed into a transceiver by providing a transmission path.

Claims

1. A receiver, comprising:

a mixer having an input for receiving a reception signal and an output for tapping an intermediate frequency signal;

a phase locked loop for receiving a mixer clock and connected to said mixer;

an analog/digital converter connected to said output of said mixer and receiving a converter clock;

a reference generator for generating a reference clock, the reference clock being an integral multiple of the mixer clock, and the converter clock being an integral multiple of the reference clock; and

a multiplier module coupled to said reference generator and multiplying the reference clock by an integer to provide the converter clock.

2. The receiver according to claim 1, further comprising a divider module for dividing the reference clock by an integer to provide the mixer clock, said divider module coupled to said reference generator.

3. The receiver according to claim 2, wherein said divider module for dividing the reference clock by an integer has an input connected to said reference generator for receiving the reference clock and an output connected to said phase locked loop for providing the mixer clock.

4. The receiver according to claim 1, wherein said multiplier module for multiplying the reference clock by an integer has an input connected to said reference generator for receiving the reference clock and an output connected to said analog/digital converter for providing the converter clock.

5. A method for receiving a reception signal, which comprises the steps of:

receiving a mixer clock in a phase locked loop;

mixing the reception signal and providing an intermediate frequency signal in response to the mixer clock;

analog/digital converting the intermediate frequency signal using a converter clock;

generating a reference clock, the reference clock being an integral multiple of the mixer clock; and

providing the converter clock in response to the reference clock using an integer multiplier module.

6. The method according to claim 5, which further comprises providing the mixer clock in response to the reference clock using an integer divider module.